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SPV-M1050FDDR-122.880M

Description
LVPECL Output Clock Oscillator,
CategoryPassive components    oscillator   
File Size231KB,4 Pages
ManufacturerSunny Electronics Corp
Websitehttp://www.sunny.co.kr
Download Datasheet Parametric View All

SPV-M1050FDDR-122.880M Overview

LVPECL Output Clock Oscillator,

SPV-M1050FDDR-122.880M Parametric

Parameter NameAttribute value
Objectid7023630576
package instructionSMD, 6 PIN
Reach Compliance Codeunknown
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; TR, 7/13 INCH
Maximum control voltage3.3 V
Minimum control voltage
maximum descent time0.7 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate50 ppm
frequency stability50%
linearity10%
Installation featuresSURFACE MOUNT
Nominal operating frequency122.88 MHz
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
Oscillator typeLVPECL
Output load50 OHM
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.7 ns
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry45/55 %
VCXO
CERAMIC SMD TYPE
SPV-M10
-
-
-
-
-
-
-
NON-Multiplide
7×5 mm Industrial standard package
0.2 ps typical, RMS phase jitter(12 kHz to 20 MHz)
3.3 V supply voltage
LVPECL Output
Voltage Controlled Crystal Oscillator
Tri-state function available
■ PART NUMBERING GUIDE
SPV-M10 30 G D C R
156.250M
FREQUENCY STABILITY
TABLE 1
OPERATING
TEMPERAURE RANGE
TABLE 1
DUTY CYCLE
D : 45/55
E : 40/60
DEVIATION
A : ±20 ppm min. B : ±25 ppm min.
C : ±30 ppm min. D : ±50 ppm min.
E : ±100 ppm min.
FREQUENCY
M : MHz
PACKAGE OPTION
R : TAPE AND REEL
BLANK : BULK
■ TABLE 1.
FREQUENCY STABILITY VS. TEMPERATURE RANGE
Stability
Temp
0~50 ℃
0~60 ℃
-10~60 ℃
0~70 ℃
-10~70 ℃
-20~70 ℃
-40~85 ℃
A
B
C
D
E
F
G
±15
15
±20
20
*
*
*
±25
25
*
*
*
*
±30
30
*
*
*
*
*
*
*
±50
50
*
*
*
*
*
*
*
±100
100
*
*
*
*
*
*
*
■ ELECTRICAL SPECIFICATIONS
ITEM
Output Logic Type
Frequency Range
Supply Voltage(V
DD
)
Operating Temperature Range
Storage Temperature Range
Frequency Stability
Input Current
Output Voltage Logic High(V
OH
)
Output Voltage Logic High(V
OL
)
Rise / Fall Time
Duty Cycle
Start-up Time
Output Load Condition(LVDS)
Frequency Deviation
Voltage Control(Vc)
Linearity
Output Enable Function
(V
IH
and V
IL
)
RMS Phase Jitter
Frequency Aging
LVPECL
96/100/122.88/125/155.52/156.25 MHz
3.3 V
DC
±5 %
-20 to 70 ℃, -40 to 85 ℃
-55 to 125 ℃
±50 ppm, ±100 ppm Max.
50 mA Max.
V
CC
1.025 V
DC
Min.
V
CC
1.620 V
DC
Min.
0.3 ns Typ., 0.7 ns Max.
45 to 55 %, 40 to 60 %
10 ms Max.
50 Ω into V
CC
- 2.0 V
DC
±50 ppm, ±80 ppm, ±100 ppm Min.
1.65 ±1.35V, 1.65 ±1.65V
10 % Max.
70 % of V
DD
min. to Enable Output
30 % of V
DD
max. to Enable Output
0.2 ps Typ., 0.3 ps Max.
±5 ppm Max.
High Impedance
BW: 12 kHz to 20 MHz
25℃, First year
Pin 1 Voltage control(V
C
)
Measured over
20% to 80% of waveform
Measured at 50% of
waveform
Over operating temperature
range
With Load
Table 1
Value
Remarks
LVPECL VCXO
Standard frequency
http://www.sunny.co.kr
SUNNY ELECTRONICS CORP
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