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5962H9475407VYC

Description
OT PLD, 15.5ns, CMOS, CQCC28, CERAMIC, LCC-28
CategoryProgrammable logic devices    Programmable logic   
File Size275KB,21 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

5962H9475407VYC Overview

OT PLD, 15.5ns, CMOS, CQCC28, CERAMIC, LCC-28

5962H9475407VYC Parametric

Parameter NameAttribute value
MakerCobham Semiconductor Solutions
Parts packaging codeQLCC
package instructionQCCJ,
Contacts28
Reach Compliance Codeunknown
ECCN code3A001.A.2.C
Other features10 MACROCELLS
maximum clock frequency32 MHz
JESD-30 codeS-CQCC-J28
JESD-609 codee4
length11.43 mm
Dedicated input times11
Number of I/O lines10
Number of terminals28
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize11 DEDICATED INPUTS, 10 I/O
Output functionMACROCELL
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
Programmable logic typeOT PLD
propagation delay15.5 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum seat height2.54 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
total dose1M Rad(Si) V
width11.43 mm
Base Number Matches1
Standard Products
UT22VP10 Universal RAD
PAL
TM
Data Sheet
November 2000
FEATURES
q
High speed Universal RAD
PAL
- tPD: 15.5ns, 20ns, 25ns maximum
-
-
-
fMAX1: 33MHz maximum external frequency
Supported by industry-standard programmer
Amorphous silicon anti-fuse
q
Radiation-hardened process and design; total dose irradia-
tion testing to MIL-STD-883, Method 1019
- Total dose: 1.0E6 rads(Si)
- Upset threshold 50 MeV-cm
2
/mg (min)
- Latchup immune(LET>109 MeV-cm
2
/mg)
q
QML Q & V compliant
q
Packaging options:
- 24-pin 100-mil center DIP (0.300 x 1.2)
- 24-lead flatpack (.45 x .64)
- 28-lead quad-flatpack (.45 x .45)
q
Standard Military Drawing 5962-94754 available
q
Variable product terms, 8 to 16 per output
q
10 user-programmable output macrocells
- Registered or combinatorial operation
- Output driver polarity control selectable
- Two feedback paths available
q
Asynchronous and synchronous RAD
PAL
operation
- Synchronous PRESET
- Asynchronous RESET
q
Up to 22 input and 10 output drivers may be configured
- CMOS & TTL-compatible input and output levels
- Three-state output drivers
13
12
11
10
9
8
7
6
5
4
3
2
1
V
SS
Reset
PROGRAMMABLE ARRAY LOGIC
(132 X 44)
8
10
12
14
16
16
14
12
10
8
Preset
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
CP
V
DD
14
15
16
17
18
19
20
21
22
23
24
Figure 1. Block Diagram
1
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