CY26114
One-PLL Clock Generator
Features
■
■
■
Benefits
■
■
■
Integrated phase-locked loop
Low skew, low jitter, high accuracy outputs
3.3V operation with 2.5 V output option
Part Number
CY26114
Outputs
4
Input Frequency
25 MHz Crystal Input
Internal PLL with up to 333 MHz internal operation.
Meets critical timing requirements in complex system designs.
Enables application compatibility.
Output Frequency Range
2 copies of 100 MHz, 1 copy of 50 MHz,
1 copy 25, 33, 50, and 66 MHz (frequency selectable)
Logic Block Diagram
XIN
XOUT
OSC.
Q
Φ
VCO
P
OUTPUT
MULTIPLEXER
AND
DIVIDERS
100MHz
100MHz
50MHz
(frequency selectable)
PLL
FS0
FS1
25/33/50/66MHz
VDDL
VDD
AVDD
AVSS
VSS
VSSL
CLK4 Frequency Select Options
FS1
0
0
1
1
FS0
0
1
0
1
CLK 4
25
33
50
66
Units
MHz
MHz
MHz
MHz
Cypress Semiconductor Corporation
Document #: 38-07098 Rev. *B
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised May 15, 2008
[+] Feedback
CY26114
Absolute Maximum Conditions
Parameter
V
DD
V
DDL
T
J
Description
Supply Voltage
IO Supply Voltage
Junction Temperature
Digital Inputs
Digital Outputs Referred to V
DD
Digital Outputs Referred to V
DDL
Electro-Static Discharge
Min
–0.5
Max
7.0
7.0
125
AV
DD
+ 0.3
V
DD
+ 0.3
V
DDL
+0.3
Unit
V
V
°C
V
V
V
kV
AV
SS
– 0.3
V
SS
– 0.3
V
SS
– 0.3
2
Recommended Operating Conditions
Parameter
V
DD
V
DDL
T
A
C
LOAD
f
REF
t
PU
Description
Operating Voltage
Operating Voltage
Ambient Temperature
Maximum Load Capacitance
Reference Frequency
Power Up Time—for all VDDs to reach minimum specified voltage
(power ramps must be monotonic)
Min
3.0
2.375
0
Typ
3.3
2.5
Max
3.6
2.625
70
15
500
Unit
V
V
°C
pF
MHz
ms
25
0.05
DC Electrical Characteristics
Parameter
[2]
I
OH
I
OL
I
OH
I
OL
V
IH
V
IL
I
VDD
I
VDDL
I
VDDL
Name
Output High Current
Output Low Current
Output High Current
Output Low Current
Input High Voltage
Input Low Voltage
Supply Current
Supply Current
Supply Current
Description
V
OH
= V
DD
– 0.5, V
DD
/V
DDL
= 3.3V
V
OL
= 0.5, V
DD
/V
DDL
= 3.3V
V
OH
= V
DDL
– 0.5, V
DDL
=2.5V
V
OL
= 0.5, V
DDL
= 2.5V
CMOS levels, 70% of V
DD
CMOS levels, 30% of V
DD
AV
DD
/V
DD
Current
V
DDL
Current (V
DDL
= 3.6V)
V
DDL
Current (V
DDL
= 2.625V)
Min
12
12
8
8
0.7
Typ
24
24
16
16
Max
Unit
mA
mA
mA
mA
VDD
VDD
mA
mA
mA
0.3
25
20
15
AC Electrical Characteristics
Parameter
[2]
Name
DC
Output Duty Cycle
t
3
t
3
t
4
t
4
t5
t9
t10
Rising Edge Rate
Rising Edge Rate
Falling Edge Rate
Falling Edge Rate
Skew
Clock Jitter
PLL Lock Time
Description
Duty cycle is defined in
Figure 2;
t1/t2, 50% of
V
DD
Output clock rise time, 20%–80% of
V
DD
/V
DDL
= 3.3V
Output clock rise time, 20%–80% of
V
DDL
= 2.5V
Output clock fall time, 80%–20% of
V
DD
/V
DDL
= 3.3V
Output clock fall time, 80%–20% of
V
DDL
= 2.5V
Delay between related outputs at rising edge
Peak to peak period jitter
Min
45
0.8
0.6
0.8
0.6
Typ
50
1.4
1.2
1.4
1.2
250
200
3
Max
55
Unit
%
V/ns
V/ns
V/ns
V/ns
ps
ps
ms
Note
2. Not 100% tested.
Document #: 38-07098 Rev. *B
Page 3 of 5
[+] Feedback
CY26114
Document History Page
Document Title: CY26114 One-PLL Clock Generator
Document Number: 38-07098
Revision
**
*A
*B
ECN No.
107333
121867
2441946
Origin of
Change
CKN
RBI
AESA
Submission
Date
12/14/02
08/28/01
05/15/08
New Data Sheet
Power up requirements added to Operating Conditions Information
Updated template. Added Note “Not recommended for new designs.”
Added part number CY26114KZC, and CY26114KZCT in ordering infor-
mation table.
Description of Change
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at
cypress.com/sales.
Products
PSoC
Clocks & Buffers
Wireless
Memories
Image Sensors
psoc.cypress.com
clocks.cypress.com
wireless.cypress.com
memory.cypress.com
image.cypress.com
PSoC Solutions
General
Low Power/Low Voltage
Precision Analog
LCD Drive
CAN 2.0b
USB
psoc.cypress.com/solutions
psoc.cypress.com/low-power
psoc.cypress.com/precision-analog
psoc.cypress.com/lcd-drive
psoc.cypress.com/can
psoc.cypress.com/usb
© Cypress Semiconductor Corporation, 2002-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for
medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document #: 38-07098 Rev. *B
Revised May 15, 2008
Page 5 of 5
All products and company names mentioned in this document may be the trademarks of their respective holders.
[+] Feedback
京公网安备 11010802033920号
EEWORLD
