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LTC1748IFW#TR

Description
IC adc smpl 14bit 80msps 48tssop
CategoryAnalog mixed-signal IC    converter   
File Size522KB,20 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet Parametric Compare View All

LTC1748IFW#TR Overview

IC adc smpl 14bit 80msps 48tssop

LTC1748IFW#TR Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?incompatible
MakerLinear ( ADI )
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts48
Manufacturer packaging codeFW
Reach Compliance Code_compli
ECCN code3A991.C.3
Is SamacsysN
Maximum analog input voltage1.6 V
Minimum analog input voltage-1.6 V
Converter typeADC, PROPRIETARY METHOD
JESD-30 codeR-PDSO-G48
JESD-609 codee0
length12.5 mm
Maximum linear error (EL)0.0183%
Humidity sensitivity level1
Number of analog input channels1
Number of digits14
Number of functions1
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output bit codeOFFSET BINARY, 2'S COMPLEMENT BINARY
Output formatPARALLEL, WORD
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)235
Certification statusNot Qualified
Sampling rate80 MHz
Sample and hold/Track and holdSAMPLE
Maximum seat height1.2 mm
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature20
width6.1 mm
Base Number Matches1
LTC1748
14-Bit, 80Msps Low Noise ADC
FEATURES
s
s
s
s
s
s
s
s
s
DESCRIPTIO
s
Sample Rate: 80Msps
76.3dB SNR and 90dB SFDR (3.2V Range)
72.6dB SNR and 90dB SFDR (2V Range)
No Missing Codes
Single 5V Supply
Power Dissipation: 1.4W
Selectable Input Ranges:
±1V
or
±1.6V
240MHz Full Power Bandwidth S/H
Pin Compatible Family
25Msps: LTC1746 (14-Bit), LTC1745 (12-Bit)
50Msps: LTC1744 (14-Bit), LTC1743 (12-Bit)
65Msps: LTC1742 (14-Bit), LTC1741 (12-Bit)
80Msps: LTC1748 (14-Bit), LTC1747 (12-Bit)
48-Pin TSSOP Package
The LTC
®
1748 is an 80Msps, sampling 14-bit A/D con-
verter designed for digitizing high frequency, wide dy-
namic range signals. Pin selectable input ranges of
±1V
and
±1.6V
along with a resistor programmable mode
allow the LTC1748’s input range to be optimized for a wide
variety of applications.
The LTC1748 is perfect for demanding communications
applications with AC performance that includes 76.3dB
SNR and 90dB spurious free dynamic range. Ultralow jitter
of 0.15ps
RMS
allows undersampling of IF frequencies with
excellent noise performance. DC specs include
±3LSB
INL
and no missing codes.
The digital interface is compatible with 5V, 3V, 2V and
LVDS logic systems. The ENC and ENC inputs may be
driven differentially from PECL, GTL and other low swing
logic families or from single-ended TTL or CMOS. The low
noise, high gain ENC and ENC inputs may also be driven
by a sinusoidal signal without degrading performance. A
separate output power supply can be operated from 0.5V
to 5V, making it easy to connect directly to any low voltage
DSPs or FIFOs.
The TSSOP package with a flow-through pinout simplifies
the board layout.
APPLICATIO S
s
s
s
s
s
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
BLOCK DIAGRA
A
IN+
±1V
DIFFERENTIAL
ANALOG INPUT
80Msps, 14-Bit ADC with a 2V Differential Input Range
OV
DD
0.1µF
OF
D13
D0
CLKOUT
0.5V
TO 5V
0.1µF
CORRECTION
LOGIC AND
SHIFT
REGISTER
14
A
IN–
S/H
AMP
14-BIT
PIPELINED ADC
SENSE
BUFFER
RANGE
SELECT
DIFF AMP
1µF
GND
CONTROL LOGIC
1748 BD
V
CM
4.7µF
2.35V
REF
REFLB
0.1µF
1µF
REFHA
4.7µF
REFLA
REFHB ENC
ENC
0.1µF
1µF
DIFFERENTIAL
ENCODE INPUT
U
OUTPUT
LATCHES
OGND
V
DD
1µF
5V
1µF
MSBINV
OE
W
U
1748fa
1

LTC1748IFW#TR Related Products

LTC1748IFW#TR LTC1748CFW#TR LTC1748IFW#PBF LTC1748IFW#TRPBF LTC1748CFW#PBF LTC1748CFW#TRPBF
Description IC adc smpl 14bit 80msps 48tssop IC adc smpl 14bit 80msps 48tssop IC ADC 14BIT 80MSPS 48-TSSOP IC ADC 14BIT 80MSPS 48-TSSOP IC ADC 14BIT 80MSPS 48-TSSOP IC ADC 14BIT 80MSPS 48-TSSOP
Brand Name Linear Technology Linear Technology Linear Technology Linear Technology Linear Technology Linear Technology
Is it Rohs certified? incompatible incompatible conform to conform to conform to conform to
Maker Linear ( ADI ) Linear ( ADI ) Linear ( ADI ) Linear ( ADI ) Linear ( ADI ) Linear ( ADI )
Parts packaging code TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP
package instruction TSSOP, TSSOP, TSSOP, TSSOP48,.3,20 TSSOP, TSSOP, TSSOP48,.3,20 TSSOP,
Contacts 48 48 48 48 48 48
Manufacturer packaging code FW FW FW FW FW FW
Reach Compliance Code _compli _compli compliant compliant compliant compliant
ECCN code 3A991.C.3 3A991.C.3 3A991.C.3 3A991.C.3 3A991.C.3 3A991.C.3
Is Samacsys N N N N N N
Maximum analog input voltage 1.6 V 1.6 V 1.6 V 1.6 V 1.6 V 1.6 V
Minimum analog input voltage -1.6 V -1.6 V -1.6 V -1.6 V -1.6 V -1.6 V
Converter type ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
JESD-609 code e0 e0 e3 e3 e3 e3
length 12.5 mm 12.5 mm 12.5 mm 12.5 mm 12.5 mm 12.5 mm
Maximum linear error (EL) 0.0183% 0.0183% 0.0183% 0.0183% 0.0183% 0.0183%
Humidity sensitivity level 1 1 1 1 1 1
Number of analog input channels 1 1 1 1 1 1
Number of digits 14 14 14 14 14 14
Number of functions 1 1 1 1 1 1
Number of terminals 48 48 48 48 48 48
Maximum operating temperature 85 °C 70 °C 85 °C 85 °C 70 °C 70 °C
Output bit code OFFSET BINARY, 2'S COMPLEMENT BINARY OFFSET BINARY, 2'S COMPLEMENT BINARY OFFSET BINARY, 2'S COMPLEMENT BINARY OFFSET BINARY, 2'S COMPLEMENT BINARY OFFSET BINARY, 2'S COMPLEMENT BINARY OFFSET BINARY, 2'S COMPLEMENT BINARY
Output format PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 235 235 260 260 260 260
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Sampling rate 80 MHz 80 MHz 80 MHz 80 MHz 80 MHz 80 MHz
Sample and hold/Track and hold SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE
Maximum seat height 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Nominal supply voltage 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 20 20 30 30 30 30
width 6.1 mm 6.1 mm 6.1 mm 6.1 mm 6.1 mm 6.1 mm
Base Number Matches 1 1 1 1 1 1

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