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74F244SCX

Description
IC buffer/driver dual 20soic
Categorylogic    logic   
File Size78KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74F244SCX Overview

IC buffer/driver dual 20soic

74F244SCX Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP20,.4
Contacts20
Reach Compliance Codeunknown
Control typeENABLE LOW
seriesF/FAST
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length12.8 mm
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.064 A
Humidity sensitivity level1
Number of digits4
Number of functions2
Number of ports2
Number of terminals20
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Maximum supply current (ICC)90 mA
Prop。Delay @ Nom-Sup6.5 ns
propagation delay (tpd)6.5 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.5 mm
Base Number Matches1
74F240 • 74F241 • 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs
April 1988
Revised January 2004
74F240 • 74F241 • 74F244
Octal Buffers/Line Drivers with 3-STATE Outputs
General Description
The 74F240, 74F241 and 74F244 are octal buffers and line
drivers designed to be employed as memory and address
drivers, clock drivers and bus-oriented transmitters/receiv-
ers which provide improved PC and board density.
Features
s
3-STATE outputs drive bus lines or buffer memory
address registers
s
Outputs sink 64 mA (48 mA mil)
s
12 mA source current
s
Input clamp diodes limit high-speed termination effects
Ordering Code:
Order Code
74F240SC (Note 1)
74F240SJ (Note 1)
74F240PC
74F241SC
74F241PC
74F244SC (Note 1)
74F244SJ (Note 1)
74F244MSA (Note 1)
74F244PC
Package
Number
M20B
M20D
N20A
M20B
N20A
M20B
M20D
MSA20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Note 1:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
74F240
74F241
74F244
© 2004 Fairchild Semiconductor Corporation
DS009501
www.fairchildsemi.com
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