3 V, Parallel Input
Micropower 10-/12-Bit DACs
AD7392/AD7393
FEATURES
Micropower: 100 μA
0.1 μA typical power shutdown
Single-supply 2.7 V to 5.5 V operation
AD7392: 12-bit resolution
AD7393: 10-bit resolution
0.9 LSB differential nonlinearity error
FUNCTIONAL BLOCK DIAGRAM
AD7392
V
REF
12-BIT
DAC
12
DAC REGISTER
12
DGND CS
D0 TO D11
RS
V
DD
V
OUT
SHDN
AGND
01121-001
APPLICATIONS
Automotive 0.5 V to 4.5 V output span voltage
Portable communications
Digitally controlled calibration
PC peripherals
Figure 1.
GENERAL DESCRIPTION
The AD7392/AD7393 comprise a set of pin-compatible
10-/12-bit voltage output, digital-to-analog converters. The
parts are designed to operate from a single 3 V supply. Built
using a CBCMOS process, these monolithic DACs offer low
cost and ease of use in single-supply 3 V systems. Operation is
guaranteed over the supply voltage range of 2.7 V to 5.5 V,
making this device ideal for battery-operated applications.
The full-scale voltage output is determined by the external ref-
erence input voltage applied. The rail-to-rail REF
IN
to DAC
OUT
allows a full-scale voltage equal to the positive supply V
DD
or
any value in between. The voltage outputs are capable of sourc-
ing 5 mA.
A data latch load of 12 bits with a 45 ns write time eliminates
wait states when interfacing to the fastest processors. Addition-
ally, an asynchronous RS input sets the output to a zero scale at
power-on or upon user demand.
Both parts are offered with similar pinouts, which allows users
to select the amount of resolution appropriate for their applica-
tions without changing the circuit card.
The AD7392/AD7393 are specified for operation over the
extended industrial temperature range of −40°C to +85°C.
The AD7393AR is specified for the automotive temperature
range of −40°C to +125°C. The AD7392/AD7393 are available
in 20-lead PDIP and 20-lead SOIC packages.
For serial data input, 8-lead packaged versions, see the AD7390
and AD7391.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1996–2007 Analog Devices, Inc. All rights reserved.
AD7392/AD7393
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Timing Diagram ........................................................................... 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 12
Digital-to-Analog Converters................................................... 12
Amplifier Section ....................................................................... 12
Reference Input........................................................................... 12
Power Supply............................................................................... 13
Input Logic Levels ...................................................................... 13
Digital Interface.......................................................................... 13
Reset Pin (RS) ............................................................................. 14
Power Shutdown (SHDN)......................................................... 14
Unipolar Output Operation...................................................... 14
Bipolar Output Operation......................................................... 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 17
REVISION HISTORY
8/07—Rev. B to Rev. C
Changes to Specifications Section.................................................. 3
Changes to Table 3............................................................................ 6
Changes to Theory of Operation Section.................................... 12
Changes to Figure 29...................................................................... 13
Changes to Figure 32...................................................................... 14
Changes to Figure 33...................................................................... 15
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 17
6/04—Changed from Rev. A to Rev. B
Removed TSSOP.................................................................Universal
Changes to Ordering Guide .......................................................... 17
3/99—Changed from Rev. 0 to Rev. A
11/96—Revision 0: Initial Version
Rev. C | Page 2 of 20
AD7392/AD7393
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
At V
REF
= 2.5 V, −40°C < T
A
< +85°C, unless otherwise noted.
Table 1. AD7392
Parameter
STATIC PERFORMANCE
Resolution
1
Relative Accuracy
2
Differential Nonlinearity
2
Zero-Scale Error
Full-Scale Voltage Error
Full-Scale Temperature Coefficient
3
REFERENCE INPUT
V
REF
Range
Input Resistance
Input Capacitance
3
ANALOG OUTPUT
Current (Source)
Output Current (Sink)
Capacitive Load
3
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
3
INTERFACE TIMING
3, 5
Chip Select Write Width
Data Setup
Data Hold
Reset Pulse Width
AC CHARACTERISTICS
Output Slew Rate
Settling Time
6
Shutdown Recovery Time
DAC Glitch
Digital Feedthrough
Feedthrough
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Shutdown Supply Current
Power Dissipation
Power Supply Sensitivity
1
2
Symbol
N
INL
DNL
V
ZSE
V
FSE
TCV
FS
V
REF
R
REF
C
REF
I
OUT
I
OUT
C
L
V
IL
V
IH
I
IL
C
IL
t
CS
t
DS
t
DH
t
RS
SR
t
S
t
SDR
Conditions
3 V ± 10%
12
±1.8
±3
±0.9
±1
4.0
8.0
±8
±20
28
0/V
DD
2.5
5
5 V ± 10%
12
±1.8
±3
±0.9
±1
4.0
8.0
±8
±20
28
0/V
DD
2.5
5
1
3
100
0.8
V
DD
− 0.6
10
10
45
15
5
30
0.05
60
80
65
15
−63
Unit
Bits
LSB max
LSB max
LSB max
LSB max
mV max
mV max
mV max
mV max
ppm/°C typ
V min/max
MΩ typ
4
pF typ
mA typ
mA typ
pF typ
V max
V min
μA max
pF max
ns min
ns min
ns min
ns min
V/μs typ
μs typ
μs typ
nV/s typ
nV/s typ
dB typ
T
A
= +25°C
T
A
= −40°C, +85°C
T
A
= +25°C, monotonic
Monotonic
Data = 0x000, T
A
= +25°C, +85°C
Data = 0x000, T
A
= −40°C
T
A
= +25°C, +85°C, data = 0xFFF
T
A
= −40°C, data = 0xFFF
Data = 0x800, ∆ V
OUT
= 5 LSB
Data = 0x800, ∆ V
OUT
= 5 LSB
No oscillation
1
3
100
0.5
V
DD
− 0.6
10
10
45
30
20
40
Data = 0x000 to 0xFFF to 0x000
To ±0.1% of full scale
Code 0x7FF to Code 0x800 to Code 0x7FF
0.05
70
65
15
−63
V
OUT
/V
REF
V
REF
= 1.5 V dc + 1 V p-p, data = 0x000,
f = 100 kHz
DNL < ±1 LSB
V
IL
= 0 V, no load
SHDN = 0, V
IL
= 0 V, no load
V
IL
= 0 V, no load
Δ V
DD
= ±5%
V
DD RANGE
I
DD
I
DD-SD
P
DISS
PSS
2.7/5.5
55/100
0.1/1.5
300
0.006
2.7/5.5
55/100
0.1/1.5
500
0.006
V min/max
μA typ/max
μA typ/max
μW max
%/% max
One LSB = V
REF
/4096 V for the 12-bit AD7392.
The first two codes (0x000, 0x001) are excluded from the linearity error measurement.
3
These parameters are guaranteed by design and not subject to production testing.
4
Typicals represent average readings measured at +25°C.
5
All input control signals are specified with t
R
= t
F
= 2 ns (10% to 90% of 13 V) and timed from a voltage level of 1.6 V.
6
The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
Rev. C | Page 3 of 20
AD7392/AD7393
At V
REF
= 2.5 V, −40°C < T
A
< +85°C, unless otherwise noted.
Table 2. AD7393
Parameter
STATIC PERFORMANCE
Resolution
1
Relative Accuracy
2
Differential Nonlinearity
2
Zero-Scale Error
Full-Scale Voltage Error
Full-Scale Temperature Coefficient
3
REFERENCE INPUT
V
REF IN
Range
Input Resistance
Input Capacitance
3
ANALOG OUTPUT
Output Current (Source)
Output Current (Sink)
Capacitive Load
3
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
3
INTERFACE TIMING
3, 5
Chip Select Write Width
Data Setup
Data Hold
Reset Pulse Width
AC CHARACTERISTICS
Output Slew Rate
Settling Time
6
Shutdown Recovery Time
DAC Glitch
Digital Feedthrough
Feedthrough
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Shutdown Supply Current
Power Dissipation
Power Supply Sensitivity
1
2
Symbol
N
INL
DNL
V
ZSE
V
FSE
TCV
FS
V
REF
R
REF
C
REF
I
OUT
I
OUT
C
L
V
IL
V
IH
I
IL
C
IL
t
CS
t
DS
t
DH
t
RS
SR
t
S
t
SDR
Conditions
3 V ± 10%
10
±1.75
±2.0
±0.8
9.0
±32
±42
28
0/V
DD
2.5
5
5 V ± 10%
10
±1.75
±2.0
±0.8
9.0
±32
±42
28
0/V
DD
2.5
5
1
3
100
0.8
V
DD
− 0.6
10
10
45
15
5
30
0.05
60
80
65
15
−63
2.7/5.5
55
100
0.1/1.5
500
0.006
Unit
Bits
LSB max
LSB max
LSB max
mV max
mV max
mV max
ppm/°C typ
V min/max
MΩ typ
4
pF typ
mA typ
mA typ
pF typ
V max
V min
μA max
pF max
ns
ns
ns
ns
V/μs typ
μs typ
μs typ
nV/s typ
nV/s typ
dB typ
V min/max
μA typ
μA max
μA typ/max
μW max
%/% max
T
A
= +25°C
T
A
= −40°C, +85°C, +125°C
Monotonic
Data = 0x000
T
A
= +25°C, +85°C, +125°C, data = 0x3FF
T
A
= −40°C, data = 0x3FF
Data = 0x200, Δ V
OUT
= 5 LSB
Data = 0x200, Δ V
OUT
= 5 LSB
No oscillation
1
3
100
0.5
V
DD
− 0.6
10
10
45
30
20
40
Data = 0x000 to 0x3FF to 0x000
To ±0.1% of full scale
Code 0x7FF to Code 0x800 to Code 0x7FF
0.05
70
65
15
−63
2.7/5.5
55
100
0.1/1.5
300
0.006
V
OUT
/V
REF
V
DD RANGE
I
DD
I
DD-SD
P
DISS
PSS
V
REF
= 1.5 V dc 11 V p-p, data = 0x000, f = 100 kHz
DNL < ±1 LSB
V
IL
= 0 V, no load, T
A
= +25°C
V
IL
= 0 V, no load
SHDN = 0, V
IL
= 0 V, no load
V
IL
= 0 V, no load
Δ V
DD
= ±5%
One LSB = V
REF
/1024 V for the 10-bit AD7393.
The first two codes (0x000, 0x001) are excluded from the linearity error measurement.
3
These parameters are guaranteed by design and not subject to production testing.
4
Typicals represent average readings measured at +25°C.
5
All input control signals are specified with t
R
= t
F
= 2 ns (10% to 90% of 13 V) and timed from a voltage level of 1.6 V.
6
The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
Rev. C | Page 4 of 20
AD7392/AD7393
TIMING DIAGRAM
1
CS
0
t
CS
t
DS
t
DH
1
D11 TO D0
0
1
RS
0
FS
V
OUT
ZS
DATA VALID
t
RS
t
S
t
S
Figure 2. Timing Diagram
Rev. C | Page 5 of 20
01121-004
±0.1%FS
ERROR BAND
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