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74ALVC38MTCX

Description
IC gate nand 4ch 2-inp 14-tssop
Categorylogic    logic   
File Size90KB,5 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74ALVC38MTCX Overview

IC gate nand 4ch 2-inp 14-tssop

74ALVC38MTCX Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTSSOP
package instruction4.40 MM, MO-153, TSSOP-14
Contacts14
Reach Compliance Codeunknown
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup3.3 ns
propagation delay (tpd)6.7 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74ALVC38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
December 2001
Revised March 2005
74ALVC38
Low Voltage Quad 2-Input NAND Gate with
Open Drain Outputs and
3.6V Tolerant Inputs and Outputs
General Description
The ALVC38 contains four 2-input NAND gates with open
drain outputs. This product is designed for low voltage
(1.4V to 3.6V) V
CC
applications with I/O compatibility up to
3.6V.
The ALVC38 is fabricated with advanced CMOS technol-
ogy to achieve high-speed operation while maintaining
CMOS low power dissipation.
Features
s
1.4V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
3.3 ns max for 3.0V to 3.6V V
CC
4.2 ns max for 2.3V to 2.7V V
CC
6.7 ns max for 1.65V to 1.95V V
CC
s
Power-off high impedance inputs and outputs
s
Uses patented Quiet Series
¥
noise/EMI reduction
circuitry
s
Latchup conforms to JEDEC JED78
s
ESD performance:
Human body model
!
2000V
Machine model
!
250V
Ordering Code:
Order Number
74ALVC38M
74ALVC38MTC
Package Number
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
Quiet Series
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500719
www.fairchildsemi.com

74ALVC38MTCX Related Products

74ALVC38MTCX 74ALVC38MX
Description IC gate nand 4ch 2-inp 14-tssop IC gate nand 4ch 2-inp 14-soic
Is it Rohs certified? conform to conform to
Maker Fairchild Fairchild
Parts packaging code TSSOP SOIC
package instruction 4.40 MM, MO-153, TSSOP-14 0.150 INCH, MS-012, SOIC-14
Contacts 14 14
Reach Compliance Code unknown unknown
series ALVC/VCX/A ALVC/VCX/A
JESD-30 code R-PDSO-G14 R-PDSO-G14
JESD-609 code e3 e3
length 5 mm 8.65 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type NAND GATE NAND GATE
MaximumI(ol) 0.024 A 0.024 A
Humidity sensitivity level 1 1
Number of functions 4 4
Number of entries 2 2
Number of terminals 14 14
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics OPEN-DRAIN OPEN-DRAIN
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP
Encapsulate equivalent code TSSOP14,.25 SOP14,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 3.3 ns 3.3 ns
propagation delay (tpd) 6.7 ns 6.7 ns
Certification status Not Qualified Not Qualified
Schmitt trigger NO NO
Maximum seat height 1.2 mm 1.75 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 1.65 V 1.65 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 4.4 mm 3.9 mm
Base Number Matches 1 1
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