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DM74ALS804AWMX

Description
IC gate nand 6ch 2-inp 20-soic
Categorylogic    logic   
File Size40KB,4 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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DM74ALS804AWMX Overview

IC gate nand 6ch 2-inp 20-soic

DM74ALS804AWMX Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP, SOP20,.4
Contacts20
Reach Compliance Codeunknown
seriesALS
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length12.8 mm
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions6
Number of entries2
Number of terminals20
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Maximum supply current (ICC)12 mA
Prop。Delay @ Nom-Sup8 ns
propagation delay (tpd)8 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.5 mm
Base Number Matches1
DM74ALS804A Hex 2-Input NAND Driver
September 1986
Revised February 2000
DM74ALS804A
Hex 2-Input NAND Driver
General Description
This device contains six independent 2-input drivers, each
of which performs the logic NAND function.
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
Functionally and pin for pin compatible with Schottky
and low power Schottky TTL counterpart
s
Improved AC performance over Schottky and low power
Schottky counterparts
Ordering Code:
Order Number
DM74ALS804AWM
DM74ALS804AN
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Y
=
AB
Inputs
A
L
L
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
B
L
H
L
H
Y
H
H
H
L
© 2000 Fairchild Semiconductor Corporation
DS006239
www.fairchildsemi.com

DM74ALS804AWMX Related Products

DM74ALS804AWMX
Description IC gate nand 6ch 2-inp 20-soic
Is it Rohs certified? conform to
Parts packaging code SOIC
package instruction SOP, SOP20,.4
Contacts 20
Reach Compliance Code unknown
series ALS
JESD-30 code R-PDSO-G20
JESD-609 code e3
length 12.8 mm
Logic integrated circuit type NAND GATE
MaximumI(ol) 0.024 A
Humidity sensitivity level 1
Number of functions 6
Number of entries 2
Number of terminals 20
Maximum operating temperature 70 °C
Package body material PLASTIC/EPOXY
encapsulated code SOP
Encapsulate equivalent code SOP20,.4
Package shape RECTANGULAR
Package form SMALL OUTLINE
method of packing TAPE AND REEL
Peak Reflow Temperature (Celsius) 260
power supply 5 V
Maximum supply current (ICC) 12 mA
Prop。Delay @ Nom-Sup 8 ns
propagation delay (tpd) 8 ns
Certification status Not Qualified
Schmitt trigger NO
Maximum seat height 2.65 mm
Maximum supply voltage (Vsup) 5.5 V
Minimum supply voltage (Vsup) 4.5 V
Nominal supply voltage (Vsup) 5 V
surface mount YES
technology TTL
Temperature level COMMERCIAL
Terminal surface Matte Tin (Sn)
Terminal form GULL WING
Terminal pitch 1.27 mm
Terminal location DUAL
Maximum time at peak reflow temperature NOT SPECIFIED
width 7.5 mm
Base Number Matches 1

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