M58BW16F, M58BW32F
Features
M58BW16F, M58BW32F
16Mb or 32Mb (x32, Boot Block, Burst) 3.3V Supply Flash Memory
Features
• Supply voltage
– V
DD
= 2.7–3.6V (45ns) or V
DD
= 2.5–3.3V (55ns)
– V
DDQ
= V
DDQIN
= 2.4V to VDD for I/O buffers
• High performance
– Access times: 45 and 55ns
– Synchronous burst reads
– 75 MHz effective zero wait-state burst read
– Asynchronous page reads (4 double words)
• M58BW32F memory organization:
– Eight 64 Kbit small parameter blocks
– Four 128 Kbit large parameter blocks
– Sixty-two 512 Kbit main blocks
• M58BW16F memory organization:
– Eight 64 Kbit parameter blocks
– Thirty-one 512 Kbit main blocks
• Hardware block protection
– WP# pin to protect any block combination from
Program and Erase operations
– PEN signal for Program/Erase Enable
• Irreversible modify protection (OTP like) on
128 Kbits:
– Block 1 (bottom device) or block 72 (top device)
in the M58BW32F
– Blocks 2 and 3 (bottom device) or blocks 36 and
35 (top device) in the M58BW16F
• Security
– 64-bit unique device identifier (UID)
• Fast programming
– Write to buffer and program capability (8 double
words)
• Optimized for FDI drivers
– Common flash interface (CFI)
– Fast Program/Erase Suspend feature in each
block
• Low power consumption
– 100µA typical Standby current
• Electronic signature
• Manufacturer code: 0020h
– Top device codes: M58BW32FT: 8838h
M58BW16FT: 883Ah
– Bottom device codes: M58BW32FB: 8837h
M58BW16FB: 8839h
• Automotive device grade 3:
– Temperature: –40 to 125 °C
• Automotive grade certified
PDF: 09005aef8457ee46
m58bw_16-32f.pdf - Rev. A 1/13 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
M58BW16F, M58BW32F
Features
Part Numbering Information
Devices are shipped from the factory with memory content bits erased to 1. For available options, such as pack-
ages or speed, or for further information, contact your Micron sales representative. Part numbers can be verified at
www.micron.com.
Feature and specification comparison by device type is available at
www.micron.com/products.
Contact the factory for devices not found.
Table 1: Part Number Information Scheme
Part Number
Category
Device type
Architecture
Operating voltage
M58 = Parallel Flash memory
B = Burst mode
W = [2.7 V to 3.6 V] V
DD
range for 45 ns speed class
[2.5 V to 3.3 V] V
DD
range for 55 ns speed class
[2.4 V to V
DD]
V
DDQ
range for 45 ns and 55 ns speed classes
Device function/density 32F = 32 Mbit (x 32), boot block, burst, 0.11 µm technology
16F = 16 Mbit (x 32), boot block, burst, 0.11 µm technology
Array matrix
Speed
Package
Temperature range
Packing Option
T = Top boot
B = Bottom boot
4 = 45 ns
5 = 55 ns
T = PQFP80
ZA = LBGA80, 1.0 mm pitch
3 = Automotive grade certified
1
, –40 to 125 °C
Blank = Standard packing
T = Tape and reel packing
F = ECOPACK® package, tape & reel 24 mm packing
Note:
1. Qualified & characterized according to AEC Q100 & Q003 or equivalent, advanced screening according to
AEC Q001 & Q002 or equivalent.
Category Details
PDF: 09005aef8457ee46
m58bw_16-32f.pdf - Rev. A 1/13 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
M58BW16F, M58BW32F
Features
Contents
Description ...................................................................................................................................................... 7
Block Protection ......................................................................................................................................... 12
OTP Protection ........................................................................................................................................... 13
Activation Sequence ............................................................................................................................... 13
Memory Map Addresses ............................................................................................................................. 14
Signal Descriptions ......................................................................................................................................... 21
Address Inputs (A[MAX:0]) .......................................................................................................................... 21
Data Inputs/Outputs (DQ[31:0]) .................................................................................................................. 21
Chip Enable (E#) ........................................................................................................................................ 21
Output Enable (G#) .................................................................................................................................... 21
Output Disable (GD#) ................................................................................................................................. 21
Write Enable (W#) ...................................................................................................................................... 22
Reset/Power-Down (RP#) ............................................................................................................................ 22
Program/Erase Enable (PEN) ...................................................................................................................... 22
Latch Enable (L#) ....................................................................................................................................... 22
Burst Clock (K) ........................................................................................................................................... 22
Burst Address Advance (B#) ........................................................................................................................ 23
Valid Data Ready (R) ................................................................................................................................... 23
Write Protect (WP#) .................................................................................................................................... 23
Supply Voltage (V
DD)
.................................................................................................................................. 23
Output Supply Voltage (V
DDQ
) ..................................................................................................................... 23
Input Supply Voltage (V
DDQIN
) .................................................................................................................... 23
Ground (V
SS
and V
SSQ
) ................................................................................................................................. 23
Don’t Use (DNU) ........................................................................................................................................ 24
Not Connected (NC) ................................................................................................................................... 24
Bus Operations ............................................................................................................................................... 25
Asynchronous Bus Operations .................................................................................................................... 25
Asynchronous Bus Read ......................................................................................................................... 25
Asynchronous Latch Controlled Bus Read ............................................................................................... 25
Asynchronous Page Read ........................................................................................................................ 26
Asynchronous Bus Write ......................................................................................................................... 26
Output Disable ....................................................................................................................................... 26
Standby ................................................................................................................................................. 26
Reset/Power-Down ................................................................................................................................. 26
Synchronous Bus Operations ...................................................................................................................... 27
Synchronous Burst Read ......................................................................................................................... 27
Synchronous Burst Read Suspend ........................................................................................................... 28
Burst Configuration Register ....................................................................................................................... 28
Read Select Bit M15 ................................................................................................................................ 29
Standby Disable Bit M14 ......................................................................................................................... 29
X-Latency Bits M13-M11 ......................................................................................................................... 29
Y-Latency Bit M9 .................................................................................................................................... 29
Valid Data Ready Bit M8 .......................................................................................................................... 29
Valid Clock Edge Bit (M6) ........................................................................................................................ 29
Burst Wrap Bit M3 .................................................................................................................................. 29
Burst Length Bits M2-M0 ........................................................................................................................ 29
Device Commands ......................................................................................................................................... 34
READ MEMORY ARRAY Command ............................................................................................................. 35
READ ELECTRONIC SIGNATURE Command ............................................................................................... 35
READ QUERY Command ............................................................................................................................ 35
PDF: 09005aef8457ee46
m58bw_16-32f.pdf - Rev. A 1/13 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
M58BW16F, M58BW32F
Features
READ STATUS REGISTER Command ...........................................................................................................
CLEAR STATUS REGISTER Command .........................................................................................................
BLOCK ERASE Command ...........................................................................................................................
ERASE ALL MAIN BLOCKS Command .........................................................................................................
PROGRAM Command ................................................................................................................................
WRITE TO BUFFER AND PROGRAM Command ..........................................................................................
PROGRAM/ERASE SUSPEND Command .....................................................................................................
PROGRAM/ERASE RESUME Command ......................................................................................................
SET BURST CONFIGURATION REGISTER Command ..................................................................................
SET BLOCK PROTECTION CONFIGURATION REGISTER Command ............................................................
CLEAR BLOCK PROTECTION CONFIGURATION REGISTER Command .......................................................
Flowcharts .....................................................................................................................................................
Status Register ................................................................................................................................................
Program/Erase Controller Status (bit 7) .......................................................................................................
Erase Suspend Status (bit 6) ........................................................................................................................
Erase Status (Bit 5) ......................................................................................................................................
Program/Write to Buffer and Program Status (Bit 4) .....................................................................................
PEN Status (Bit 3) .......................................................................................................................................
Program Suspend Status (Bit 2) ...................................................................................................................
Block Protection Status (Bit 1) .....................................................................................................................
Reserved (Bit 0) ..........................................................................................................................................
Common Flash Interface (CFI) ........................................................................................................................
Maximum Rating ............................................................................................................................................
Program and Erase Times and Endurance Cycles .............................................................................................
DC and AC Parameters ...................................................................................................................................
Operating Conditions and Capacitance .......................................................................................................
DC Characteristics ......................................................................................................................................
Asynchronous Bus Read AC Characteristics .................................................................................................
Asynchronous Page Read AC Characteristics ................................................................................................
Asynchronous Write AC Characteristics .......................................................................................................
Synchronous Burst Read AC Characteristics .................................................................................................
AC and DC Power Characteristics ................................................................................................................
Package Dimensions .......................................................................................................................................
Revision History .............................................................................................................................................
Rev. A – 1/13 ...............................................................................................................................................
35
36
36
36
37
37
38
39
39
39
40
41
50
50
51
51
51
52
52
52
52
53
60
61
62
62
64
65
69
70
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80
83
85
85
PDF: 09005aef8457ee46
m58bw_16-32f.pdf - Rev. A 1/13 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
M58BW16F, M58BW32F
Features
List of Figures
Figure 1: Logic Diagram ................................................................................................................................... 9
Figure 2: LBGA Connections (Top View through Package) ............................................................................... 11
Figure 3: PQFP Connections (Top View through Package) ............................................................................... 12
Figure 4: Example Burst Configuration X-1-1-1 ............................................................................................... 32
Figure 5: Example Burst Configuration X-2-2-2 ............................................................................................... 33
Figure 6: Program Flowchart and Pseudocode ................................................................................................ 41
Figure 7: Program Suspend & Resume Flowchart and Pseudocode .................................................................. 42
Figure 8: Block Erase Flowchart and Pseudocode ............................................................................................ 43
Figure 9: Erase Suspend & Resume Flowchart and Pseudocode ....................................................................... 44
Figure 10: Power-up Sequence followed by Synchronous Burst Read ............................................................... 45
Figure 11: Command Interface and Program/Erase Controller Flowchart (A) ................................................... 46
Figure 12: Command Interface and Program/Erase Controller Flowchart (B) ................................................... 47
Figure 13: Command Interface and Program/Erase Controller Flowchart (C) ................................................... 48
Figure 14: Command Interface and Program/Erase Controller Flowchart (D) ................................................... 49
Figure 15: AC Measurement Input/Output Waveform ..................................................................................... 62
Figure 16: AC Measurement Load Circuit ....................................................................................................... 63
Figure 17: Asynchronous Bus Read AC Waveforms .......................................................................................... 65
Figure 18: Asynchronous Latch Controlled Bus Read AC Waveforms ................................................................ 66
Figure 19: Asynchronous Chip Enable Controlled Bus Read AC Waveforms ...................................................... 66
Figure 20: Asynchronous Address Controlled Bus Read AC Waveforms ............................................................ 67
Figure 21: Asynchronous Page Read AC Waveforms ........................................................................................ 69
Figure 22: Asynchronous Write E# - Controlled AC Waveforms ........................................................................ 70
Figure 23: Asynchronous Write W# - Controlled AC Waveforms ....................................................................... 72
Figure 24: Synchronous Burst Read, Latch Enable Controlled (data valid from ’n’ clock rising edge) ................. 74
Figure 25: Synchronous Burst Read, Chip Enable Controlled (data valid from ’n’ clock rising edge) ................... 75
Figure 26: Synchronous Burst Read, Valid Address Transition Controlled (data valid from ’n’ clock rising edge) ...76
Figure 27: Synchronous Burst Read (data valid from ’n’ clock rising edge) ........................................................ 77
Figure 28: Synchronous Burst Read (valid data ready output) .......................................................................... 77
Figure 29: Synchronous Burst Read (Burst Address Advance) .......................................................................... 78
Figure 30: Clock Input AC waveform .............................................................................................................. 78
Figure 31: Power Supply Slope Specification ................................................................................................... 80
Figure 32: Reset, Power-down, and Power-up AC Waveforms - Control Pins Low .............................................. 81
Figure 33: Reset, Power-down, and Power-up AC Waveforms - Control Pins Toggling ........................................ 81
Figure 34: 80-Pin LBGA – 10mm x 12mm ........................................................................................................ 83
Figure 35: 80-Lead PQFP ............................................................................................................................... 84
PDF: 09005aef8457ee46
m58bw_16-32f.pdf - Rev. A 1/13 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2013 Micron Technology, Inc. All rights reserved.
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