The W681310 is a general-purpose single channel PCM CODEC with pin-selectable
-Law
or A-Law
companding. The device is compliant with the ITU G.712 specification. It operates from a single +3V
power supply and is available in 20-pin SOG, SSOP and TSSOP package options. Functions
performed include digitization and reconstruction of voice signals, and band limiting and smoothing
filters required for PCM systems. W681310 performance is specified over the industrial temperature
range of –40C to +85C.
The W681310 includes an on-chip precision voltage reference and an additional power amplifier,
capable of driving 300 loads differentially up to a level of 3.544V peak-to-peak. The analog section is
fully differential, reducing noise and improving the power supply rejection ratio. The data transfer
protocol supports both long-frame and short-frame synchronous communications for PCM
applications, and IDL and GCI communications for ISDN applications. W681310 accepts eight master
clock rates between 256 kHz and 4.800 MHz, and an on-chip pre-scaler automatically determines the
division ratio for the required internal clock.
For fast evaluation and prototyping purposes, the W681310DK development kit is available.
2. FEATURES
Single +3V power supply (2.7V to 5.25V)
Typical power dissipation of 10 mW,
power-down mode of 0.5
W
Fully-differential analog circuit design
On-chip precision reference of 0.886 V for
a -5 dBm TLP at 600
Push-pull power amplifiers with external
gain adjustment with 300
load capability
Eight master clock rates of 256 kHz to
4.800 MHz
Pin-selectable
-Law
and
A-Law
companding (compliant with ITU G.711)
CODEC A/D and D/A filtering compliant
with ITU G.712
Industrial temperature range (–40C to
+85C)
Packages: 20-pin SOG (SOP), SSOP and
TSSOP
Pb-Free package options available
ApplIcations
VoIP, Voice over Networks
Digital telephone
systems
and
communication
Wireless voice devices
PABX/SOHO systems
Local loop card
SOHO routers
Fiber-to-curb equipment
Enterprise phones
ISDN equipment
Modems/PC cards
Digital Voice Recorders
-2-
Publication Release Date: February 2015
Revision B18
W681310
3. BLOCK DIAGRAM
Receive
PCM
Interface
BCLKR
FSR
PCMR
BCLKT
FST
PCMT
Re
Int
PC
cei
erf
M
ve
ace
Transmit
PCM
Interface
Tra Int
ns PC erf
mitM ace
G.712 CODEC
G.711
/A - Law
PAO+
PAO-
PAI
RO -
AO
AI+
AI-
/A-Law
V
REF
512 kHz
256 kHz
MCLK
256 kHz,
512 kHz,
1536 kHz,
1544 kHz,
2048 kHz,
2560 kHz
4096 kHz
& 4800 kHz
Pre -scaler
Scaler
8 kHz
Voltage reference
V
AG
Power Conditioning
V
DD
PUI
V
SS
-3-
Publication Release Date: February 2015
Revision B18
W681310
4. TABLE OF CONTENTS
1. GENERAL DESCRIPTION.................................................................................................................. 2
2. FEATURES ......................................................................................................................................... 2
10.1. General Parameters .................................................................................................................. 22
10.2. Analog Signal Level and Gain Parameters ............................................................................... 23
10.3. Analog Distortion and Noise Parameters .................................................................................. 24
10.4. Analog Input and Output Amplifier Parameters ......................................................................... 25
10.5. Digital I/O ................................................................................................................................... 27
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