* Pb containing terminations are not RoHS compliant, exemptions may apply.
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
1
Si9185
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Input Voltage, V
IN
SD Input Voltage, V
SD
Output Current, I
OUT
Output Voltage, V
OUT
Maximum Junction Temperature, T
J(max)
Storage Temperature, T
STG
ESD (Human Body Model)
Power Dissipation
a
Thermal Resistance (Θ
JA
)
a
R
ΘJA
R
ΘJC
Limit
6.5
- 0.3 to V
IN
500 mA Continuous, Short Circuit Protected
- 0.3 to V
O(nom)
+ 0.3
150
- 55 to 150
2
2.5
50
4
Unit
V
mA
V
°C
kV
W
°C/W
Notes:
a. Device Mounted with all leads soldered or welded to PC board. (PC board - 2" x 2", 4-layer, FR4, 0.25 square inch spreading copper).
b. Derate 20 mW/°C above T
A
= 25 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Input Voltage, V
IN
Output Voltage, V
OUT
(Adjustable Version)
R2
Operating Ambient Temperature, T
A
Operating Junction Temperature, T
J
Notes:
C
IN
= 2.2 µF, C
OUT
= 2.2 µF (ceramic, X5R or X7R type), C
NOISE
= 0.1 µF (ceramic)
C
OUT
Range = 1 µF to 10 µF (± 10 %, x5R or x7R type)
C
IN
≥
C
OUT
Limit
2 to 6
1.215 to 5
25 to 150
- 40 to 85
- 40 to 125
Unit
V
kΩ
°C
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
V
IN
= V
OUT(nom)
+ 1 V, I
OUT
= 1 mA,
C
IN
= 2.2 µF, C
OUT
= 2.2 µF, V
SD
= 1.5 V
Adjustable Version
V
OUT
1 mA
≤
I
OUT
≤
500 mA
Limits
- 40 °C to 85 °C
Temp.
a
Full
Room
Full
Room
Full
From V
IN
= V
OUT
+ 1 V
to V
OUT
+ 2 V
From V
IN
= 5.5 V to 6 V
I
OUT
= 10 mA
Dropout Voltage
d
(at V
OUT(nom)
≥
2 V)
V
IN
- V
OUT
Dropout Voltage
d
(at V
OUT(nom)
≥
2.5 V)
I
OUT
= 200 mA
I
OUT
= 500 mA
I
OUT
= 200 mA
I
OUT
= 500 mA
Full
Full
Room
Room
Room
Full
Room
Room
Full
115
250
Min.
b
1.215
- 1.5
- 2.5
1.191
1.179
- 0.18
- 0.18
5
145
320
1.215
Typ.
c
Max.
b
5
1.5
2.5
1.239
1.251
0.18
%/V
0.18
20
215
480
600
175
400
480
mV
Unit
V
% V
O(nom)
V
Parameter
Output Voltage Range
Output Voltage Accuracy
(Fixed Versions)
Feedback Voltage
(ADJ Version)
Line Regulation
(V
ADJ
≤
V
OUT
≤
4 V)
Line Regulation
(4 V V
OUT
≤
5 V)
Symbol
V
ADJ
ΔV
OUT
x 100
V
IN
x V
OUT
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
V
IN
= V
OUT(nom)
+ 1 V, I
OUT
= 1 mA,
C
IN
= 2.2 µF, C
OUT
= 2.2 µF, V
SD
= 1.5 V
I
OUT
= 200 mA
V
IN
- V
OUT
I
OUT
= 500 mA
I
OUT
= 200 mA
V
IN
- V
OUT
I
OUT
= 500 mA
I
OUT
= 200 mA
V
IN
- V
OUT
I
OUT
= 500 mA
I
OUT
= 0 mA
Ground Pin Current
I
GND
I
OUT
= 200 mA
I
OUT
= 500 mA
Shutdown Supply Current
ADJ Pin Current
Peak Output current
Output Noise Voltage
I
IN(off)
I
ADJ
I
O(peak)
e
N
V
SD
= 0 V
ADJ = 1.2 V
V
OUT
≥
0.95 x V
OUT(nom)
, t
pw
= 2 ms
BW = 50 Hz to 100 kHz
I
OUT
= 150 mA
I
OUT
= 150 mA
w/o C
NOISE
C
NOISE
= 0.1 µF
f = 1 kHz
Ripple Rejection
ΔV
OUT
/ΔV
IN
ΔV
O(line)
ΔV
O(load)
t
ON
f = 10 kHz
f = 100 kHz
Dynamic Line Regulation
Dynamic Load Regulation
V
OUT
Turn-On Time
Thermal Shutdown
Thermal Shutdown Junction
Temperature
Thermal Hysteresis
Short Circuit Current
Shutdown Input
SD Input Voltage
SD Input Current
e
Shutdown Hysteresis
V
IH
V
IL
I
IH
I
IL
V
HYST
High = Regulator On (Rising)
Low = Regulator Off (Falling)
V
SD
= 0 V, Regulator OFF
V
SD
= 6 V, Regulator ON
Full
Full
Room
Room
Full
0.01
1.0
100
1.5
V
IN
0.4
V
µA
mV
t
J(s/d)
t
HYST
I
SC
V
OUT
= 0 V
Room
Room
Room
165
20
800
mA
°C
V
IN
: V
OUT(nom)
+ 1 V to V
OUT(nom)
+ 2 V
t
R
/t
F
= 5 µs, I
OUT
= 500 mA
I
OUT
: 1 mA to 150 mA, t
R
/t
F
= 2 µs
V
IN
= 4.3 V
V
OUT
= 3.3 V
w/o C
NOISE
Cap
C
NOISE
= 0.1 µF
Limits
- 40 °C to 85 °C
Temp.
a
Room
Room
Full
Room
Room
Full
Room
Room
Full
Room
Room
Full
Room
Full
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
600
200
100
60
60
40
10
30
5
2
µs
mS
mV
dB
0.1
5
2500
4000
1
100
µA
nA
mA
µV(rms)
170
415
150
1000
1500
µA
60
150
Min.
b
Typ.
c
90
200
Max.
b
135
300
400
100
210
300
250
625
825
mV
Unit
Parameter
Symbol
Dropout Voltage
d
(at V
OUT(nom)
≥
3.3 V)
Dropout Voltage
d
(at V
OUT(nom)
≥
5 V)
Dropout Voltage
d
(at V
OUT(nom)
< 2 V, V
IN
≥
2 V)
Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
www.vishay.com
3
Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
V
IN
= V
OUT(nom)
+ 1 V, I
OUT
= 1 mA,
C
IN
= 2.2 µF, C
OUT
= 2.2 µF, V
SD
= 1.5 V
ERROR = V
OUT(nom)
I
SINK
= 2 mA
Limits
- 40 °C to 85 °C
Temp.
a
Full
Full
Full
Room
Room
1.2
0.93 x
V
OUT
0.95 x
V
OUT
2%x
V
OUT
2.2
3.0
µA
Min.
b
Typ.
c
0.01
Max.
b
2
0.4
0.97 x
V
OUT
V
Unit
µA
Parameter
Error Output
Output High Leakage
Output Low Voltage
g
Out-of-Regulation Error Flag
Threshold Voltage (Rising)
g
Hysteresis
g
Delay Pin Current Source
Symbol
I
OFF
V
OL
V
TH
V
HYST
I
DELAY
Notes:
a. Room = 25 °C, Full = - 40 °C to 85 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at V
OUT
≥
2 V
are measured at V
OUT
= 3.3 V, while typical values for dropout voltage at V
OUT
< 2 V are measured at V
OUT
= 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2 % below the output voltage measured
with a 1 V differential, provided that VIN does not drop below 2.0 V. When V
OUT(nom)
is less than 2.0 V, the output will be in regulation when
2.0 V - V
OUT(nom)
is greater than the dropout voltage specified.
e. The device’s shutdown pin includes a typical 6 MΩ internal pull-down resistor connected to ground.
f. V
OUT
is defined as the output voltage of the DUT at 1 mA.
g. The Error Output (Low) function is guaranteed for V
IN
≥
2.0 V.
TIMING WAVEFORMS
V
IN
t
ON
V
NOM
0.95 V
NOM
V
OUT
ERROR
t
DELAY
Figure 4. Timing Diagram for Power-Up
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Document Number: 71765
S09-2454-Rev. G, 23-Nov-09
Si9185
Vishay Siliconix
PIN CONFIGURATION
MLP33 PowerPAK
MLP33 PowerPAK
C
NOISE
DELAY
GND
V
IN
1
2
3
4
8
7
6
5
SD
ERROR
SENSE or ADJ
V
OUT
SD
ERROR
SENSE or ADJ
V
OUT
8
7
6
5
1
2
3
4
C
NOISE
DELAY
GND
V
IN
Exposed Pad
Top View
Bottom View
PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
Name
C
NOISE
DELAY
GND
V
IN
V
OUT
SENSE or ADJ
ERROR
SD
Exposed Pad
Function
Noise bypass pin. For low noise applications, a 0.01 µF or larger ceramic capacitor should be connected
from this pin to ground.
Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7)
output. Refer to Figure 4.
Ground pin. Local ground for C
NOISE
and C
OUT
.
Input supply pin. Bypass this pin with a 2.2 µF ceramic or tantalum capacitor to ground.
Output voltage. Connect C
OUT
between this pin and ground.
For fixed output voltage versions, this pin should be connected to V
OUT
(Pin 5). For adjustable output
voltage version, this voltage feedback pin sets the output voltage via an external resistor divider.
This open drain output is an error flag output which goes low when V
OUT
drops 5 % below its nominal
voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin.
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to V
IN
if unused.
The die substrate is attached to the exposed pad and must be electrically connected to GND.
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Analog electronics
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