Note the following details of the code protection feature on Microchip devices:
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
•
•
•
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EE
L
OQ
, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro
®
8-bit MCUs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS39637A-page ii
Preliminary
2004 Microchip Technology Inc.
PIC18F2480/2580/4480/4580
28/40/44-Pin Enhanced Flash Microcontrollers with
ECAN™ Technology, 10-Bit A/D and nanoWatt Technology
Power Managed Modes:
•
•
•
•
•
•
•
•
Run: CPU on, peripherals on
Idle: CPU off, peripherals on
Sleep: CPU off, peripherals off
Idle mode currents down to 5.8
µA
typical
Sleep mode current down to 0.1
µA
typical
Timer1 Oscillator: 1.1
µA,
32 kHz, 2V
Watchdog Timer: 2.1
µA
Two-Speed Oscillator Start-up
Peripheral Highlights:
•
•
•
•
High current sink/source 25 mA/25 mA
Three external interrupts
One Capture/Compare/PWM (CCP) module
Enhanced Capture/Compare/PWM (ECCP) module
(40/44-pin devices only):
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-Shutdown and Auto-Restart
Master Synchronous Serial Port (MSSP) module
supporting 3-wire SPI™ (all 4 modes) and I
2
C™
Master and Slave modes
Enhanced Addressable USART module
- Supports RS-485, RS-232 and LIN 1.3
- RS-232 operation using internal oscillator
block (no external crystal required)
- Auto-Wake-up on Start bit
- Auto-Baud detect
10-bit, up to 11-channel Analog-to-Digital
Converter module (A/D), up to 100 Ksps
- Auto-acquisition capability
- Conversion available during Sleep
Dual analog comparators with input multiplexing
Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4X Phase Lock Loop (PLL) – available for crystal
and internal oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal oscillator block:
- 8 user selectable frequencies, from 31 kHz to 8 MHz
- Provides a complete range of clock speeds,
from 31 kHz to 32 MHz when used with PLL
- User tunable to compensate for frequency drift
• Secondary oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor
- Allows for safe shutdown if peripheral clock stops
•
•
•
•
Special Microcontroller Features:
• C compiler optimized architecture with optional
extended instruction set
• 100,000 erase/write cycle Enhanced Flash
program memory typical
• 1,000,000 erase/write cycle Data EEPROM
memory typical
• Flash/Data EEPROM Retention: > 40 years
• Self-programmable under software control
• Priority levels for interrupts
• 8 x 8 Single Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 41 ms to 131s
• Single-Supply 5V In-Circuit Serial
Programming™ (ICSP™) via two pins
• In-Circuit Debug (ICD) via two pins
• Wide operating voltage range: 2.0V to 5.5V
Program Memory
Device
PIC18F2480
PIC18F2580
PIC18F4480
PIC18F4580
Data Memory
I/O
25
36
25
36
ECAN Module Features:
• Message bit rates up to 1 Mbps
• Conforms to CAN 2.0B ACTIVE Specification
• Fully backward compatible with PIC18XXX8 CAN
modules
• Three modes of operation:
- Legacy, Enhanced Legacy, FIFO
• Three dedicated transmit buffers with prioritization
• Two dedicated receive buffers
• Six programmable receive/transmit buffers
• Three full 29-bit acceptance masks
• 16 full 29-bit acceptance filters w/ dynamic association
• DeviceNet™ data byte filter support
• Automatic remote frame handling
• Advanced error management features
Flash # Single-Word SRAM EEPROM
(bytes) Instructions (bytes) (bytes)
16K
32K
16K
32K
8192
16384
8192
16384
768
1536
768
1536
256
256
256
256
10-bit
A/D (ch)
8
8
11
11
CCP/
ECCP
(PWM)
1/0
1/0
1/1
1/1
MSSP
Master
SPI™
2
I C™
Y
Y
Y
Y
Y
Y
Y
Y
EUSART
Comp.
0
0
2
2
Timers
8/16-bit
1/3
1/3
1/3
1/3
1
1
1
1
2004 Microchip Technology Inc.
Preliminary
DS39637A-page 1
FPGA/CPLD
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EEWORLD
