LIN D
O C
#:
8383
LX8383-xx/8383A-xx/8383B-xx
7 . 5 A L
O W
D
R O P O U T
P
O S I T I V E
R
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T
H E
I
N F I N I T E
P
O W E R
O F
I
N N O VA T I O N
P
R O D U C T I O N
D
A T A
S
H E E T
DESCRIPTION
The LX8383/8383A/8383B series ICs are
positive regulators designed to provide
7.5A output current. All internal circuitry
is designed to operate down to a 1V in-
put-to-output differential, so the LX8383/
83A/83B can operate with greater effi-
ciency than previously available devices.
The dropout voltage for each product is
fully specified as a function of load cur-
rent.
Dropout is guaranteed at a maxi-
mum of 1.3V
for the LX8383A/83B and
1.5V
for the LX8383, at maximum output
current, decreasing at lower load currents.
Fixed versions are also available and speci-
fied in the Available Options table below.
The LX8383B offers a tighter voltage ref-
erence tolerance: 0.8% initial accuracy and
1% over line, load and temperature. The
LX8383/83A have 1% initial accuracy and
2% over line, load and temperature.
The LX8383/83A/83B series devices are
pin-compatible with earlier 3-terminal
regulators, such as the 117 series prod-
ucts. While a 10µF output capacitor is
required on both input and output of these
new devices, this capacitor is generally
included in most regulator designs.
The LX8383/83A/83B series quiescent
current flows into the load, thereby
increasing efficiency. This feature
contrasts with PNP regulators, where up
to 10% of the output current is wasted as
quiescent current. The LX8383I/8383AI is
specified over the industrial temperature
range of -25°C to +125°C and the
LX8383C/8383AC/8383BC is specified
over the commercial range of 0°C to
+125°C.
K E Y F E AT U R E S
s
THREE-TERMINAL ADJUSTABLE OR FIXED
OUTPUT VOLTAGE
s
GUARANTEED < 1.3V HEADROOM AT
7.5A (LX8383A/8383B)
s
GUARANTEED < 1.5V HEADROOM AT
7.5A (LX8383)
s
OUTPUT CURRENT OF 7.5A MINIMUM
p
0.015% LINE REGULATION
p
0.15% LOAD REGULATION
s
EVALUATION BOARD AVAILABLE:
REQUEST
LXE9001 EVALUATION KIT
A P P L I C AT I O N S
s
PENTIUM
®
PROCESSOR APPLICATIONS
s
HIGH EFFICIENCY LINEAR REGULATORS
s
POST REGULATORS FOR SWITCHING
POWER SUPPLIES
s
BATTERY CHARGERS
s
CONSTANT CURRENT REGULATORS
s
CYRIX
®
6x86
TM
s
AMD-K5
TM
PRODUCT HIGHLIGHT
3.3V, 7.5A R
E G U L AT O R
IN
OUT
121Ω
1%
A
VA I L A B L E
O
P T I O N S
Part #
PER
P
AR T
#
Output
Voltage
Adjustable
3.3V
V
IN
≥
4.75V
1500µF
6.3V
6MV1500GX
from Sanyo
LX8383A
ADJ
3.38V at 7.5A
2x 330µF, 6.3V
Oscon SA type
from Sanyo
-or-
3x 1500µF, 6.3V
6MV1500GX
from Sanyo
LX8383/83A/83B-00
LX8383/83A/83B-33
Other voltage options may be available —
Please contact factory for details.
205
Ω
1%
Application of the LX8383A for the standard voltage (non VRE) Pentium Processor motherboard
with less than 130mV dynamic response to a 7.5A load transient.
PA C K A G E O R D E R I N F O R M AT I O N
T
A
(°C)
Dropout
Voltage
1.5V
0 to 125
1.3V
1.3V
1.5V
1.3V
P
Plastic TO-220
3-pin
LX8383-xxCP
LX8383A-xxCP
LX8383B-xxCP
LX8383-xxIP
LX8383A-xxIP
V
Plastic TO-247
3-terminal
LX8383-xxCV
LX8383A-xxCV
LX8383B-xxCV
LX8383-xxIV
LX8383A-xxIV
-25 to 125
"xx" refers to output voltage, please see table above.
F O R F U R T H E R I N F O R M AT I O N C A L L ( 7 1 4 ) 8 9 8 - 8 1 2 1
Copyright © 1996
Rev. 1.0 12/96
11861 W
ESTERN
A
VENUE
, G
ARDEN
G
ROVE
, CA. 92841
1
PRODUCT DATABOOK 1996/1997
LX8383-xx/8383A-xx/8383B-xx
7 . 5 A L
O W
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R O P O U T
P
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P
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S
H E E T
A B S O L U T E M A X I M U M R AT I N G S
(Note 1)
PACKAGE PIN OUTS
TAB IS V
OUT
3
2
1
Power Dissipation .................................................................................. Internally Limited
Input Voltage ................................................................................................................ 10V
Input to Output Voltage Differential ........................................................................... 10V
Operating Junction Temperature
Plastic (P & V Packages) ....................................................................................... 150°C
Storage Temperature Range ...................................................................... -65°C to 150°C
Lead Temperature (Soldering, 10 seconds) ............................................................. 300°C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect
to Ground. Currents are positive into, negative out of the specified terminal.
V
IN
V
OUT
ADJ / GND*
P PACKAGE
(Top View)
* Pin 1 is GND for fixed voltage versions.
TAB ON REVERSE SIDE IS V
OUT
T H ER MAL DATA
P PACKAGE:
THERMAL RESISTANCE-JUNCTION TO TAB,
θ
JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
V PACKAGE:
THERMAL RESISTANCE-JUNCTION TO TAB,
θ
JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
1.6°C/W
35°C/W
2.7°C/W
60°C/W
3
2
1
V
IN
V
OUT
ADJ / GND*
V PACKAGE
(Top View)
* Pin 1 is GND for fixed voltage versions.
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board system.
All of the above assume no ambient airflow.
BLOCK D IAGR AM
V
IN
Bias
Circuit
Thermal
Limit Circuit
Bandgap
Circuit
Control
Circuit
Output
Circuit
V
OUT
SOA Protection
Circuit
ADJ or
GND*
* This pin GND for fixed voltage versions.
Current
Limit Circuit
2
Copyright © 1996
Rev. 1.0 12/96
PRODUCT DATABOOK 1996/1997
LX8383-xx/8383A-xx/8383B-xx
7 . 5 A L
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H E E T
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for the LX8383-xxC/8383A-xxC/8383B-xxC with 0°C
≤
T
A
≤
125°C, the LX8383-xxI/8383A-xxI with -25°C
≤
T
A
≤
125°C; V
IN
- V
OUT
= 3V; I
OUT
= 7.5A. Low duty cycle pulse testing techniques are used which
maintains junction and case temperatures equal to the ambient temperature.)
LX8383-00/83A-00/83B-00
(Adjustable)
Parameter
Reference Voltage
(Note 4)
LX8383/83A-00
Symbol
V
REF
Test Conditions
LX8383/83A/83B-00
Min. Typ.
Max.
1.238
1.225
1.240
1.238
1.250
1.250
1.250
1.250
0.015
0.035
0.15
0.3
0.01
83
55
0.2
1.2
1
2
9.5
0.25
0.3
0.003
1.262
1.270
1.260
1.262
0.2
0.3
0.4
0.5
0.02
Units
V
V
V
V
%
%
%
%
%/W
dB
µA
µA
V
V
mA
A
%
%
%
I
OUT
= 10mA, T
A
= 25°C
10mA
≤
I
OUT
≤
I
OUT (MAX)
, 1.5V
≤
(V
IN
- V
OUT
), V
IN
≤
10V, P
≤
P
MAX
LX8383B-00
I
OUT
= 10mA, T
A
= 25°C
10mA
≤
I
OUT
≤
I
OUT (MAX)
, 1.5V
≤
(V
IN
- V
OUT
), V
IN
≤
10V, P
≤
P
MAX
Line Regulation (Note 2)
∆V
REF
1.5V
≤
(V
IN
- V
OUT
), V
IN
≤
7V
(V
IN
)
1.5V
≤
(V
IN
- V
OUT
), V
IN
≤
10V
Load Regulation (Note 2)
∆V
REF
V
OUT
≥
V
REF
, V
IN
- V
OUT
= 3V, 10mA
≤
I
OUT
≤
7.5A, T
A
= 25°C
(I
OUT
) V
IN
- V
OUT
= 3V, 10mA
≤
I
OUT
≤
7.5A
Thermal Regulation
∆V
OUT
(Pwr)
T
A
= 25°C, 20ms pulse
Ripple Rejection (Note 3)
V
OUT
= 5V, f =120Hz, C
OUT
= 100µf Tantalum, V
IN
= 6.5V
C
ADJ
= 10µF, I
OUT
= 7.5A
Adjust Pin Current
I
ADJ
Adjust Pin Current Change (Note 4)
∆
I
ADJ
10mA
≤
I
OUT
≤
I
OUT (MAX)
, 1.5V
≤
(V
IN
- V
OUT
), V
IN
≤
10V
Dropout Voltage
LX8383-00
∆V
∆V
REF
= 1%, I
OUT
= 7.5A
LX8383A/83B-00
∆V
REF
= 1%, I
OUT
= 7.5A
Minimum Load Current
I
OUT (MIN)
V
IN
≤
10V
Maximum Output Current
I
OUT (MAX)
(V
IN
- V
OUT
)
≤
7V
Temperature Stability (Note 3)
∆V
OUT
(T)
Long Term Stability (Note 3)
∆V
OUT
(t) T
A
= 125°C, 1000 hours
RMS Output Noise (% of V
OUT
) (Note 3) V
OUT (RMS)
T
A
= 25°C, 10Hz
≤
f
≤
10kHz
65
100
5
1.5
1.3
10
7.5
1
LX8383-33/83A-33/83B-33
(3.3V Fixed)
Parameter
Output Voltage
(Note 4)
LX8383/83A-33
Symbol
V
OUT
Test Conditions
LX8383/83A/83B-33
Min. Typ.
Max.
3.267
3.235
3.274
3.267
3.3
3.3
3.3
3.3
1
2
5
0.01
83
4
3.333
3.365
3.326
3.333
6
10
15
0.02
10
1.5
1.3
1
Units
V
V
V
V
mV
mV
mV
%/W
dB
mA
V
V
A
%
%
%
V
IN
= 5V, I
OUT
= 0mA, T
A
= 25°C
4.75V
≤
V
IN
≤
10V, 0mA
≤
I
OUT
≤
7.5A, P
≤
P
MAX
LX8383B-33
V
IN
= 5V, I
OUT
= 0mA, T
A
= 25°C
4.75V
≤
V
IN
≤
10V, 0mA
≤
I
OUT
≤
7.5A, P
≤
P
MAX
Line Regulation (Note 2)
∆V
OUT
4.75V
≤
V
IN
≤
7V
(V
IN
)
4.75V
≤
V
IN
≤
10V
Load Regulation (Note 2)
∆V
OUT
(I
OUT
)
V
IN
= 5V, 0mA
≤
I
OUT
≤
I
OUT (MAX)
Thermal Regulation
∆V
OUT
(Pwr)
T
A
= 25°C, 20ms pulse
Ripple Rejection (Note 3)
C
OUT
= 100µF (Tantalum), I
OUT
= 7.5A
Quiescent Current
I
Q
0mA
≤
I
OUT
≤
I
OUT (MAX)
, 4.75V
≤
V
IN
≤
10V
Dropout Voltage
LX8383-33
∆V
∆V
OUT
= 1%, I
OUT
≤
I
OUT (MAX)
, V
IN
≤
7V
LX8383A/83B-33
∆V
OUT
= 1%, I
OUT
≤
I
OUT (MAX)
, V
IN
≤
7V
Maximum Output Current
I
OUT (MAX)
V
IN
≤
7V
Temperature Stability (Note 3)
∆V
OUT
(T)
Long Term Stability (Note 3)
∆V
OUT
(t) T
A
= 125°C, 1000 hours
RMS Output Noise (% of V
OUT
) (Note 3) V
OUT (RMS)
T
A
= 25°C, 10Hz
≤
f
≤
10kHz
60
7.5
9.5
0.25
0.3
0.003
Note 2. Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specification for thermal regulation.
Note 3. These parameters, although guaranteed, are not tested in production.
Note 4. See Maximum Output Current Section above.
Copyright © 1996
Rev. 1.0 12/96
3
PRODUCT DATABOOK 1996/1997
LX8383-xx/8383A-xx/8383B-xx
7 . 5 A L
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R O P O U T
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H E E T
A P P L I C AT I O N N O T E S
The LX8383/83A/83B series ICs are easy to use Low-Dropout (LDO)
voltage regulators. They have all of the standard self-protection
features expected of a voltage regulator: short circuit protection,
safe operating area protection and automatic thermal shutdown if
the device temperature rises above approximately 165°C.
Use of an output capacitor is REQUIRED with the LX8383/83A/
83B series. Please see the table below for recommended minimum
capacitor values.
These regulators offer a more tightly controlled reference voltage
tolerance and superior reference stability when measured against
the older pin-compatible regulator types that they replace.
STABILITY
The output capacitor is part of the regulator’s frequency compen-
sation system. Many types of capacitors are available, with different
capacitance value tolerances, capacitance temperature coefficients,
and equivalent series impedances. For all operating conditions,
connection of a 220µF aluminum electrolytic capacitor or a 47µF
solid tantalum capacitor between the output terminal and ground
will guarantee stable operation.
If a bypass capacitor is connected between the output voltage
adjust (ADJ) pin and ground, ripple rejection will be improved
(please see the section entitled “RIPPLE
REJECTION”).
When ADJ
pin bypassing is used, the required output capacitor value increases.
Output capacitor values of 220µF (aluminum) or 47µF (tantalum)
provide for all cases of bypassing the ADJ pin. If an ADJ pin bypass
capacitor is not used, smaller output capacitor values are adequate.
The table below shows recommended minimum capacitance values
for stable operation.
RECOMMENDED CAPACITOR VALUES
INPUT
10µF
10µF
Power Supply
IN
LX8383/83A
/83B
ADJ
OUT
Minumum Load
(Larger resistor)
Full Load
(Smaller resistor)
R
DSON
<< R
L
1 sec
Star Ground
10ms
FIGURE 1
— DYNAMIC INPUT and OUTPUT TEST
OVERLOAD RECOVERY
Like almost all IC power regulators, the LX8383/83A/83B regulators
are equipped with Safe Operating Area (SOA) protection. The SOA
circuit limits the regulator's maximum output current to progres-
sively lower values as the input-to-output voltage difference
increases. By limiting the maximum output current, the SOA circuit
keeps the amount of power that is dissipated in the regulator itself
within safe limits for all values of input-to-output voltage within the
operating range of the regulator. The LX8383/83A/83B SOA
protection system is designed to be able to supply some output
current for all values of input-to-output voltage, up to the device
breakdown voltage.
Under some conditions, a correctly operating SOA circuit may
prevent a power supply system from returning to regulated
operation after removal of an intermittent short circuit at the output
of the regulator. This is a normal mode of operation which can be
seen in most similar products, including older devices such as 7800
series regulators. It is most likely to occur when the power system
input voltage is relatively high and the load impedance is relatively
low.
When the power system is started “cold”, both the input and
output voltages are very close to zero. The output voltage closely
follows the rising input voltage, and the input-to-output voltage
difference is small. The SOA circuit therefore permits the regulator
to supply large amounts of current as needed to develop the
designed voltage level at the regulator output. Now consider the
case where the regulator is supplying regulated voltage to a resistive
load under steady state conditions. A moderate input-to-output
voltage appears across the regulator but the voltage difference is
small enough that the SOA circuitry allows sufficient current to flow
through the regulator to develop the designed output voltage across
the load resistance. If the output resistor is short-circuited to ground,
the input-to-output voltage difference across the regulator suddenly
becomes larger by the amount of voltage that had appeared across
the load resistor. The SOA circuit reads the increased input-to-
output voltage, and cuts back the amount of current that it will
permit the regulator to supply to its output terminal. When the short
circuit across the output resistor is removed, all the regulator output
current will again flow through the output resistor. The maximum
current that the regulator can supply to the resistor will be limited
by the SOA circuit, based on the large input-to-output voltage across
the regulator at the time the short circuit is removed from the output.
OUTPUT
15µF Tantalum, 100µF Aluminum
47µF Tantalum, 220µF Aluminum
ADJ
None
15µF
In order to ensure good transient response from the power supply
system under rapidly changing current load conditions, designers
generally use several output capacitors connected in parallel. Such
an arrangement serves to minimize the effects of the parasitic
resistance (ESR) and inductance (ESL) that are present in all
capacitors. Cost-effective solutions that sufficiently limit ESR and
ESL effects generally result in total capacitance values in the range
of hundreds to thousands of microfarads, which is more than
adequate to meet regulator output capacitor specifications. Output
capacitance values may be increased without limit.
The circuit shown in Figure 1 can be used to observe the transient
response characteristics of the regulator in a power system under
changing loads. The effects of different capacitor types and values
on transient response parameters, such as overshoot and under-
shoot, can be quickly compared in order to develop an optimum
solution.
4
Copyright © 1996
Rev. 1.0 12/96
PRODUCT DATABOOK 1996/1997
LX8383-xx/8383A-xx/8383B-xx
7 . 5 A L
O W
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P
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H E E T
A P P L I C AT I O N N O T E S
OVERLOAD RECOVERY
(continued)
If this limited current is not sufficient to develop the designed
voltage across the output resistor, the voltage will stabilize at some
lower value, and will
never
reach the designed value. Under these
circumstances, it may be necessary to cycle the input voltage down
to zero in order to make the regulator output voltage return to
regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor should
be chosen so that the impedance of the capacitor is equal in
magnitude to the resistance of R1
at the ripple frequency.
The
capacitor value can be determined by using this equation:
C = 1 / (6.28 * F
R
* R1)
where: C
≡
the value of the capacitor in Farads;
select an equal or larger standard value.
F
R
≡
the ripple frequency in Hz
R1
≡
the value of resistor R1 in ohms
LX8383/83A/83B
OUT
IN
ADJ
I
ADJ
50µA
V
OUT
= V
REF
1 + R2 + I
ADJ
R2
R1
R2
V
IN
V
OUT
V
REF
R1
FIGURE 2
— BASIC ADJUSTABLE REGULATOR
LOAD REGULATION
Because the LX8383/83A/83B regulators are three-terminal devices,
it is not possible to provide true remote load sensing. Load
regulation will be limited by the resistance of the wire connecting
the regulator to the load. The data sheet specification for load
regulation is measured at the bottom of the package. Negative side
sensing is a true Kelvin connection, with the bottom of the output
divider returned to the negative side of the load. Although it may
not be immediately obvious, best load regulation is obtained when
the top of the resistor divider, (R1), is connected
directly
to the case
of the regulator,
not to the load.
This is illustrated in Figure 3. If R1
were connected to the load, the effective resistance between the
regulator and the load would be:
R
Peff
= R
P
*
At a ripple frequency of 120Hz, with R1 = 100Ω:
C = 1 / (6.28 * 120Hz * 100Ω) = 13.3µF
The closest equal or larger standard value should be used, in this
case, 15µF.
When an ADJ pin bypass capacitor is used, output ripple
amplitude will be essentially independent of the output voltage. If
an ADJ pin bypass capacitor is not used, output ripple will be
proportional to the ratio of the output voltage to the reference
voltage:
M = V
OUT
/V
REF
where: M
V
REF
≡
a multiplier for the ripple seen when the
ADJ pin is optimally bypassed.
= 1.25V.
R2+R1
R1
where: R
P
≡
Actual parasitic line resistance.
When the circuit is connected as shown in Figure 3, the parasitic
resistance appears as its actual value, rather than the higher R
Peff
.
R
P
Parasitic
LX8383/83A/83B
Line Resistance
OUT
IN
ADJ
Connect
R1
R2
For example, if V
OUT
= 2.5V the output ripple will be:
M = 2.5V/1.25V= 2
Output ripple will be twice as bad as it would be if the ADJ pin
were to be bypassed to ground with a properly selected capacitor.
OUTPUT VOLTAGE
The LX8383/83A/83B ICs develop a 1.25V reference voltage between
the output and the adjust terminal (See Figure 2). By placing a resistor,
R1, between these two terminals, a constant current is caused to flow
through R1 and down through R2 to set the overall output voltage.
Normally this current is the specified minimum load current of 10mA.
Because I
ADJ
is very small and constant when compared with the current
through R1, it represents a small error and can usually be ignored.
V
IN
R1 to Case
of Regulator
R
L
Connect
R2
to Load
FIGURE 3
— CONNECTIONS FOR BEST LOAD REGULATION
Copyright © 1996
Rev. 1.0 12/96
5