M
PIC16F84A
Pin Diagrams
PDIP, SOIC
RA2
RA3
RA4/T0CKI
MCLR
V
SS
RB0/INT
RB1
RB2
RB3
•
1
18-pin
Enhanced
Flash/EEPROM 8-Bit Microcontroller
Devices Included in this Data Sheet:
• PIC16F84A
• Extended voltage range device available
(PIC16
LF
84A)
18
17
16
15
14
13
12
11
10
RA1
RA0
OSC1/CLKIN
OSC2/CLKOUT
V
DD
RB7
RB6
RB5
RB4
High Performance RISC CPU Features:
• Only 35 single word instructions to learn
• All instructions single cycle except for program
branches which are two-cycle
• Operating speed: DC - 20 MHz clock input
DC - 200 ns instruction cycle
• 1024 words of program memory
• 68 bytes of data RAM
• 64 bytes of data EEPROM
• 14-bit wide instruction words
• 8-bit wide data bytes
• 15 special function hardware registers
• Eight-level deep hardware stack
• Direct, indirect and relative addressing modes
• Four interrupt sources:
- External RB0/INT pin
- TMR0 timer overflow
- PORTB<7:4> interrupt on change
- Data EEPROM write complete
2
3
4
5
6
7
8
9
SSOP
RA2
RA3
RA4/T0CKI
MCLR
V
SS
V
SS
RB0/INT
RB1
RB2
RB3
•
1
PIC16F84A
PIC16F84A
20
19
18
17
16
15
14
13
12
11
RA1
RA0
OSC1/CLKIN
OSC2/CLKOUT
V
DD
V
DD
RB7
RB6
RB5
RB4
2
3
4
5
6
7
8
9
10
Peripheral Features:
• 13 I/O pins with individual direction control
• High current sink/source for direct LED drive
- 25 mA sink max. per pin
- 25 mA source max. per pin
• TMR0: 8-bit timer/counter with 8-bit
programmable prescaler
CMOS
Enhanced
Flash/EERPOM Technology:
• Low-power, high-speed technology
• Fully static design
• Wide operating voltage range:
- Commercial: 2.0V to 5.5V
- Industrial:
2.0V to 5.5V
• Low power consumption:
- < 2 mA typical @ 5V, 4 MHz
- 15
µ
A typical @ 2V, 32 kHz
- < 0.5
µ
A typical standby current @ 2V
Special Microcontroller Features:
• 1000 erase/write cycles
Enhanced
Flash program
memory
• 1,000,000 typical erase/write cycles EEPROM data
memory
• EEPROM Data Retention > 40 years
• In-Circuit Serial Programming (ICSP™) - via two
pins
• Power-on Reset (POR), Power-up Timer (PWRT),
Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Code-protection
• Power saving SLEEP mode
• Selectable oscillator options
©
1998 Microchip Technology Inc.
Preliminary
DS35007A-page 1
PIC16F84A
Table of Contents
1.0 Device Overview ............................................................................................................................................................................ 3
2.0 Memory Organization..................................................................................................................................................................... 5
3.0 I/O Ports....................................................................................................................................................................................... 13
4.0 Timer0 Module ............................................................................................................................................................................. 17
5.0 Data EEPROM Memory............................................................................................................................................................... 19
6.0 Special Features of the CPU ....................................................................................................................................................... 21
7.0 Instruction Set Summary.............................................................................................................................................................. 33
8.0 Development Support .................................................................................................................................................................. 35
9.0 Electrical Characteristics for PIC16F84A..................................................................................................................................... 41
10.0 DC & AC Characteristics Graphs/Tables ..................................................................................................................................... 53
11.0 Packaging Information ................................................................................................................................................................. 55
Appendix A: Revision History ........................................................................................................................................................... 59
Appendix B: Conversion Considerations.......................................................................................................................................... 59
Appendix C: Migration from Baseline to Midrange Devices ............................................................................................................. 62
Index ................................................................................................................................................................................................... 63
On-Line Support................................................................................................................................................................................... 65
Reader Response ................................................................................................................................................................................ 66
PIC16F84A Product Identification System ........................................................................................................................................... 67
To Our Valued Customers
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please check our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number. e.g., DS30000A is version A of document DS30000.
Errata
An errata sheet may exist for current devices, describing minor operational differences (from the data sheet) and recommended
workarounds. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
• The Microchip Corporate Literature Center; U.S. FAX: (602) 786-7277
When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include lit-
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Corrections to this Data Sheet
We constantly strive to improve the quality of all our products and documentation. We have spent a great deal of time to ensure
that this document is correct. However, we realize that we may have missed a few things. If you find any information that is missing
or appears in error, please:
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We appreciate your assistance in making this a better document.
DS35007A-page 2
Preliminary
©
1998 Microchip Technology Inc.
PIC16F84A
1.0
DEVICE OVERVIEW
This document contains device-specific information for
the operation of the PIC16F84A device. Additional
information may be found in the PICmicro™ Mid-Range
Reference Manual, (DS33023), which may be down-
loaded from the Microchip website. The Reference
Manual should be considered a complementary docu-
ment to this data sheet, and is highly recommended
reading for a better understanding of the device archi-
tecture and operation of the peripheral modules.
The PIC16F84A belongs to the mid-range family of the
PICmicro™ microcontroller devices. A block diagram of
the device is shown in Figure 1-1.
The program memory contains 1K words, which trans-
lates to 1024 instructions, since each 14-bit program
memory word is the same width as each device instruc-
tion. The data memory (RAM) contains 68 bytes. Data
EEPROM is 64 bytes.
There are also 13 I/O pins that are user-configured on
a pin-to-pin basis. Some pins are multiplexed with other
device functions. These functions include:
• External interrupt
• Change on PORTB interrupt
• Timer0 clock input
Table 1-1 details the pinout of the device with descrip-
tions and details for each pin.
FIGURE 1-1:
PIC16F84A BLOCK DIAGRAM
13
Data Bus
Program Counter
8
EEPROM Data Memory
Flash
Program
Memory
PIC16F84A
1K x 14
Program
Bus
8 Level Stack
(13-bit)
RAM
File Registers
PIC16F84A
68 x 8
7
RAM Addr
EEDATA
EEPROM
Data Memory
64 x 8
14
EEADR
Instruction reg
5
Direct Addr
Addr Mux
7
Indirect
Addr
TMR0
FSR reg
RA4/T0CKI
STATUS reg
8
Power-up
Timer
Instruction
Decode &
Control
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
W reg
ALU
MUX
8
I/O Ports
RA3:RA0
RB7:RB1
Timing
Generation
RB0/INT
OSC2/CLKOUT
OSC1/CLKIN
MCLR
V
DD
, V
SS
©
1998 Microchip Technology Inc.
Preliminary
DS35007A-page 3
PIC16F84A
TABLE 1-1
Pin Name
OSC1/CLKIN
OSC2/CLKOUT
PIC16F84A PINOUT DESCRIPTION
DIP
No.
16
15
SOIC
No.
16
15
SSOP
No.
18
19
I/O/P
Type
I
O
Buffer
Type
Description
ST/CMOS
(3)
Oscillator crystal input/external clock source input.
—
Oscillator crystal output. Connects to crystal or resonator in
crystal oscillator mode. In RC mode, OSC2 pin outputs
CLKOUT which has 1/4 the frequency of OSC1, and
denotes the instruction cycle rate.
Master clear (reset) input/programming voltage input. This
pin is an active low reset to the device.
PORTA is a bi-directional I/O port.
MCLR
4
4
4
I/P
ST
RA0
RA1
RA2
RA3
RA4/T0CKI
17
18
1
2
3
17
18
1
2
3
19
20
1
2
3
I/O
I/O
I/O
I/O
I/O
TTL
TTL
TTL
TTL
ST
Can also be selected to be the clock input to the TMR0
timer/counter. Output is open drain type.
PORTB is a bi-directional I/O port. PORTB can be software
programmed for internal weak pull-up on all inputs.
RB0/INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
V
SS
V
DD
Legend: I= input
6
7
8
9
10
11
12
13
5
14
6
7
8
9
10
11
12
13
5
14
7
8
9
10
11
12
13
14
5,6
15,16
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
P
TTL/ST
(
1)
TTL
TTL
TTL
TTL
TTL
TTL/ST
(2)
RB0/INT can also be selected as an external interrupt
pin.
Interrupt on change pin.
Interrupt on change pin.
Interrupt on change pin. Serial programming clock.
Interrupt on change pin. Serial programming data.
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
TTL/ST
(2)
—
—
O = output
I/O = Input/Output
P = power
— = Not used
TTL = TTL input
ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
2: This buffer is a Schmitt Trigger input when used in serial programming mode.
3: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise.
DS35007A-page 4
Preliminary
©
1998 Microchip Technology Inc.
PIC16F84A
2.0
MEMORY ORGANIZATION
FIGURE 2-1:
There are two memory blocks in the PIC16F84A.
These are the program memory and the data memory.
Each block has its own bus, so that access to each
block can occur during the same oscillator cycle.
The data memory can further be broken down into the
general purpose RAM and the Special Function
Registers (SFRs). The operation of the SFRs that
control the “core” are described here. The SFRs used
to control the peripheral modules are described in the
section discussing each individual peripheral module.
The data memory area also contains the data
EEPROM memory. This memory is not directly mapped
into the data memory, but is indirectly mapped. That is,
an indirect address pointer specifies the address of the
data EEPROM memory to read/write. The 64 bytes of
data EEPROM memory have the address range
0h-3Fh. More details on the EEPROM memory can be
found in Section 5.0.
Additional information on device memory may be found
in the PICmicro™ Mid-Range Reference Manual,
(DS33023).
PROGRAM MEMORY MAP
AND STACK - PIC16F84A
PC<12:0>
13
CALL, RETURN
RETFIE, RETLW
Stack Level 1
•
•
•
Stack Level 8
Reset Vector
Peripheral Interrupt Vector
0000h
0004h
User Memory
Space
2.1
Program Memory Organization
3FFh
The PIC16FXX has a 13-bit program counter capable
of addressing an 8K x 14 program memory space.
For the PIC16F84A, the first 1K x 14 (0000h-03FFh)
are physically implemented (Figure 2-1). Accessing a
location above the physically implemented address will
cause a wraparound. For example, for locations 20h,
420h, 820h, C20h, 1020h, 1420h, 1820h, and 1C20h
will be the same instruction.
The reset vector is at 0000h and the interrupt vector is
at 0004h.
1FFFh
©
1998 Microchip Technology Inc.
Preliminary
DS35007A-page 5