LC89091JAGEVK
LC89091JA Digital Audio Interface Receiver
Test Procedure
http://onsemi.com
This document explains various evaluations of digital audio interface receiver LC89091JA.
Table of Contents
1.
2.
3.
4.
5.
6.
7.
Function Check (PC doesn't use)
Function Check (PC uses)
Consumption Current Measurement
Lock-up Time Measurement
PLL Clock Jitter Measurement
S/PDIF Input Jitter Tolerance Measurement
Example of Sound Qualitiy Evaluation Circuit Configuration
(2 channel stereo audio)
8. Example of Sound Qualitiy Evaluation Circuit Configuration
(5.1 channel multi-channel audio)
P- 2
P- 3
P- 4
P- 5
P- 6
P- 7
P- 8
P- 9
Modification History
Ver
0.00
Date
2013.04.02
First edition
Description
1/9
LC89091JAGEVK Test Procedure
1. Function Check (PC doesn’t use)
• Basic operation of LC89091JA can be checked.
3.3V
DC supply
CN8
CN7
CN2
JP6
3
2
1
D5
Analog Input
S/PDIF
Input
TOS1
6MHz
JP3
2
JP4
2
1
3
1
4
3
6
5
4
SDIN
GN D
CN5
LC89091
24.57 MHz
DATA
LRCK
BCK
GN D
MCK
GN D
ADC
(Slave)
TOS2
3
2
1
DAC
JP9
J1
CN1
D 2
D4 D3
CN3
CN6
LC89091JAGEVB
Power supply
Register control
S/PDIF input
ADC connection
DAC connection
USB
YES
TOSLINK
YES
YES
External DC
NO
COAXIAL
NO
NO
DSP connection
PLL error monitor
Non-PCM monitor
Emphasis monitor
Demodulation data
YES
LED (D3)
LED (D4)
LED (D2)
Oscilloscope
NO
PC
PC
PC
Audio output
S/PDIF
Linear-PCM
×
Input
Input
×
Non-PCM
×
×
×
Input
Emphasis
input
×
No
Yes
×
D2
Emphasis
Off
Off
Turn on
Off
LED indication
D3
PLL error
Turn on
Off
Off
Off
D4
Non-PCM
Off
Off
Off
Turn on
DAC output
ADC data
Demodulation data
Demodulation data
Demodulation data
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LC89091JAGEVK Test Procedure
2. Function Check (PC uses)
• PC can be connected by USB and operation of LC89091JA can be checked by I2C control.
PC
USB
CN8
CN7
CN2
JP6
3
2
1
D5
Analog Input
S/PDIF
Input
S/PDIF
Input
TOS1
6MHz
JP3
2
JP4
2
1
3
1
4
3
6
5
4
SDIN
GN D
CN5
LC89091
24.57 MHz
DATA
LRCK
BCK
GN D
MCK
GN D
ADC
(Slave)
TOS2
3
2
1
DAC
JP9
J1
CN1
D 2
D4 D3
CN3
CN6
LC89091JAGEVB
Power supply
Register control
S/PDIF input
ADC connection
DAC connection
USB
YES
TOSLINK
YES
YES
External DC
NO
COAXIAL
NO
NO
DSP connection
PLL error monitor
Non-PCM monitor
Emphasis monitor
Demodulation data
YES
LED (D3)
LED (D4)
LED (D2)
Oscilloscope
NO
PC
PC
PC
Audio output
Setting
Item
System
Clock
Data
Fs
R/W
R/W
R/W
R/W
R
R
R
Adr
00h
01h
02h
03h
04h
05h
06h
07h
08h
D7
"0"
"0"
NPMODE
0
CS7
CS15
CS23
CS31
CS39
D6
MPSEL
"0"
ERRSEL
0
CS6
CS14
CS22
CS30
CS38
D5
DATWT
XOUTCK
GPOSEL1
0
CS5
CS13
CS21
CS29
CS37
D4
ERRWT
PRSEL1
GPOSEL0
ERRFLG
CS4
CS12
CS20
CS28
CS36
D3
ADMODE
PRSEL0
DATMUT
FSC3
CS3
CS11
CS19
CS27
CS35
D2
AMPOPR
PLLDIV1
THRSEL
FSC2
CS2
CS10
CS18
CS26
CS34
D1
PDMODE
PLLDIV0
DINSEL
FSC1
CS1
CS9
CS17
CS25
CS33
D0
SYSRST
PLLACC
DAFORM
FSC0
CS0
CS8
CS16
CS24
CS32
Channel
status
R
R
R
3/9
LC89091JAGEVK Test Procedure
3. Consumption Current Measurement
• The consumption current of LC89091JA can be measured.
• JP5 socket remove and a current measurement machine insert in TP12 and TP13.
• Current limiting resistor (R5, R8, R10, R23) of LED remove.
• The current of various states can be measured by register control. (Current at the time of power down, etc.)
PC
USB
CN8
6 MHz
3.3V
DC supply
CN7
CN2
JP6
3
2
1
D5
TP12
TOS1
JP3
2
JP4
2
TOS2
3
1
1
4
3
6
5
4
R23
JP5
(Removal)
TP13
CN5
LC89091
R5 R10 R8
2 4.57M Hz
S/PDIF
Input
J1
JP9
CN1
3
2
1
(Remova l)
D2
D4 D3
CN3
CN6
LC89091JAGEVB
Power supply
Register control
S/PDIF input
ADC connection
DAC connection
USB
YES
TOSLINK
YES
YES
External DC
NO
COAXIAL
NO
NO
DSP connection
PLL error monitor
Non-PCM monitor
Emphasis monitor
Demodulation data
YES
LED (D3)
LED (D4)
LED (D2)
Oscilloscope
NO
PC
PC
PC
Audio output
Setting
Item
System
Clock
Data
Fs
R/W
R/W
R/W
R/W
R
R
R
Adr
00h
01h
02h
03h
04h
05h
06h
07h
08h
D7
"0"
"0"
NPMODE
0
CS7
CS15
CS23
CS31
CS39
D6
MPSEL
"0"
ERRSEL
0
CS6
CS14
CS22
CS30
CS38
D5
DATWT
XOUTCK
GPOSEL1
0
CS5
CS13
CS21
CS29
CS37
D4
ERRWT
PRSEL1
GPOSEL0
ERRFLG
CS4
CS12
CS20
CS28
CS36
D3
ADMODE
PRSEL0
DATMUT
FSC3
CS3
CS11
CS19
CS27
CS35
D2
AMPOPR
PLLDIV1
THRSEL
FSC2
CS2
CS10
CS18
CS26
CS34
D1
PDMODE
PLLDIV0
DINSEL
FSC1
CS1
CS9
CS17
CS25
CS33
D0
SYSRST
PLLACC
DAFORM
FSC0
CS0
CS8
CS16
CS24
CS32
Channel
status
R
R
R
4/9
LC89091JAGEVK Test Procedure
4. Lock-up Time Measurement
• Time until an error flag is canceled is measured after S/PDIF input.
• It is set as register ERRSEL (address 02h, D6) =1.
PC
USB
CN8
6 MHz
CN7
CN2
JP6
3
2
1
D5
TOS1
JP3
2
JP4
2
1
3
1
4
3
6
5
4
TP6
CN5
LC89091
2 4.57M Hz
S/PDIF signal
TOS2
S/PDIF
Input
J1
ERR output
JP9
CN1
3
2
1
TP9
D 2
D4 D3
CN3
CN6
LC89091JAGEVB
Power supply
Register control
S/PDIF input
ADC connection
DAC connection
USB
YES
TOSLINK
YES
YES
External DC
NO
COAXIAL
NO
NO
DSP connection
PLL error monitor
Non-PCM monitor
Emphasis monitor
Demodulation data
YES
LED (D3)
LED (D4)
LED (D2)
Oscilloscope
NO
PC
PC
PC
Audio output
PLL unlock
PLL lock
S/PDIF
input
(ERRSEL=1)
ERR
output
Wait time
Data output
start
(ERRWT register)
Lock-up Time
5/9
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