VC709 Evaluation
Board for the
Virtex-7 FPGA
User Guide
UG887 (v1.3) April 30, 2014
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Revision History
The following table shows the revision history for this document.
Date
02/04/2013
06/04/2013
Version
1.0
1.1
Initial Xilinx release.
Changed XC7VX690T-2FFG1761CES to XC7VX690T-2FFG1761C throughout the
document. Changed SiT9122 to SiT9102. The data rate in
Linear BPI Flash Memory,
page 19
changed from 40 MHz to 80 MHz. Added items 28 and 29 to the board
photograph in
Figure 1-2.
FPGA EMCC clock information was added to
Table 1-7,
Table 1-8, Figure 1-13,
and
FPGA EMCC Clock, page 31.
In
Table 1-18,
the DS1
description for RED changed. Replaced
Figure 1-22
Configuration Mode and Upper Linear
Flash Address Switch.
Enhanced section
Switches, page 49.
Updated part ordering
information in
FMC_VADJ Voltage, page 59.
Updated
Figure 1-29
VC709 Board
Configuration Circuit.
Replaced
Appendix C,
Master UCF Listing
with
Master XDC
Listing.
Updated
References, page 97.
Revised the content of
Table 1-16, page 43.
Revised
Table 1-20
to correct connection of
FMC1_HPC_LA29_N, page 55
to FPGA pin T30 (Was W30). Revised all links and
references in
Appendix F, Additional Resources
and revised links to web pages and
documents throughout document to conform to latest linking style convention. Added
caution note about power connections to J18 on the VC709 board on
page 94.
Revised
link under
Declaration of Conformity in Appendix G
to point directly at the Certificate
PDF instead of
XTP251,
the list of Certificates of Conformity.
Tech Pubs edit. Technical content not affected.
Revised the data rate for the
small outline dual-inline memory modules (SODIMMs)
in
VC709 Board Features
and
Dual DDR3 Memory SODIMMs.
Revision
01/07/2014
1.2
03/11/2014
04/30/2014
1.2.1
1.3
VC709 Evaluation Board
www.xilinx.com
UG887 (v1.3) April 30, 2014
Table of Contents
Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Chapter 1: VC709 Evaluation Board Features
Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
VC709 Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Feature Descriptions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Virtex-7 XC7VX690T-2FFG1761C FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Dual DDR3 Memory SODIMMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Linear BPI Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
USB JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Memory Clock (SYSCLK_233_P and SYSCLK_233_N) . . . . . . . . . . . . . . . . . . . . . . . . . 30
FPGA EMCC Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
GTH Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PCI Express Endpoint Connectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SFP/SFP+ Module Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
USB-to-UART Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
I
2
C Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Status LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
User I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
VITA 57.1 FMC1 HPC Connector (Partially Populated) . . . . . . . . . . . . . . . . . . . . . . . . 51
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
FMC_VADJ Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
XADC Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Configuration Options
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Appendix A: Default Switch and Jumper Settings
GPIO DIP Switch SW2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Configuration DIP Switch SW11
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Default Jumper Settings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Appendix B: VITA 57.1 FMC Connector Pinouts
Appendix C: Master XDC Listing
VC709 Board XDC Listing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Appendix D: Board Setup
Installing the VC709 Board in a PC Chassis
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
VC709 Evaluation Board
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Appendix E: Board Specifications
Dimensions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Environmental
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Humidity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Operating Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Appendix F: Additional Resources
Xilinx Resources
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Solution Centers
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
References
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Appendix G: Regulatory and Compliance Information
Declaration of Conformity
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Directives
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Standards
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Electromagnetic Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Markings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4
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VC709 Evaluation Board
UG887 (v1.3) April 30, 2014
Chapter 1
VC709 Evaluation Board Features
Overview
The VC709 evaluation board for the Virtex®-7 FPGA provides a hardware environment for
developing and evaluating designs targeting the Virtex-7 XC7VX690T-2FFG1761C FPGA.
The VC709 board provides features common to many embedded processing systems,
including dual DDR3 small outline dual-inline memory module (SODIMM) memories, an
8-lane PCI Express® interface, general purpose I/O, and a UART interface. Other features
can be added by using mezzanine cards attached to the VITA-57 FPGA mezzanine
connector (FMC) provided on the board. A high pin count (HPC) FMC is provided. See
VC709 Board Features
for a complete list of features. The details for each feature are
described in
Feature Descriptions, page 7.
Additional Information
See
Appendix F, Additional Resources
for references to documents, files, and resources
relevant to the VC709 board.
VC709 Board Features
•
•
•
•
•
Virtex-7 XC7VX690T-2FFG1761C FPGA
2X 4 GB 1600MTs DDR3 memory SODIMMs
128 MB linear byte-wide peripheral interface (BPI) flash memory
USB JTAG through Digilent module
Clock generation
•
•
•
•
•
•
•
•
•
•
•
•
Fixed 200 MHz LVDS oscillator
Fixed 233.33 MHz LVDS oscillator
I
2
C programmable LVDS oscillator
SMA connectors
SMA connectors for GTH transceiver clocking
FMC HPC connector (eight transceivers)
SMA connectors (one pair for MGT_REFCLK)
PCI Express (eight lanes)
4 X Small form-factor pluggable plus (SFP+) connectors
Gen1 8-lane (x8)
GTH transceivers
PCI Express endpoint connectivity
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