Features
•
Stereo Audio DAC
2.7V to 3.3V Analog Supply Operation
2.4V to 3.3V Digital Supply Operation
20-bit Stereo Audio DAC
93 dB SNR Playback Stereo Channels
32 Ohm/20 mW Stereo Headset Drivers with Master Volume and Mute Controls
Stereo Line Level Input with Volume Control/mute and Playback through the
Headset Drivers
– Differential Monaural Auxiliary Input, with Volume Control/mute and Playback
through the Headset Drivers
– Accepts Mixed Signals from All Signal Paths (Line Inputs, External Mono and DAC
Output)
– 8, 11.024, 16, 22.05, 24, 32, 44.1 and 48 kHz Sampling Rates
– 256x or 384xFs Master Clock Frequency
– I2S Serial Audio Interface
•
Mono Audio Power Amplifier
– Supply Input from Main Li-Ion Battery
– 440mW on 8 Ohm Load
– Low Power Mode for Earphone
– Programmable Volume Control (-22 to +20 dB)
– Fully Differential Structure, Input and Output
– 8 mA Drain Current in Full Power Mode
– Power-down mode (Consumption Less than 2 µA)
– Minimum External Components (Direct Connection of the Loudspeaker)
•
Applications: Mobile Phones, Digital Cameras, PDAs, SmartPhones, DECT Phones,
Music Players
–
–
–
–
–
–
Power
Management for
Mobiles (PM)
AT73C213
Audio Interface
for Portable
Handsets
1. Description
The AT73C213 is a fully integrated, low-cost, combined stereo audio DAC and audio
power amplifier circuit targeted for Li-Ion or Ni-Mh battery powered devices such as
mobile phones, smartphones, PDA, DECT phones, digital still cameras, music players
or any other type of handheld device where an audio interface is needed.
The stereo DAC section is a complete high performance, stereo audio digital-to-ana-
log converter delivering a 93 dB dynamic range. It comprises a multibit sigma-delta
modulator with dither, continuous time analog filters and analog output drive circuitry.
This architecture provides a high insensitivity to clock jitter. The digital interpolation fil-
ter increases the sample rate by a factor of 8 using 3 linear phase half-band filters
cascaded, followed by a first order SINC interpolator with a factor of 8. This filter elim-
inates the images of baseband audio, retaining only the image at 64x the input sample
rate, which is eliminated by the analog post filter. Optionally, a dither signal can be
added that reduces possible noise tones at the output. However, the use of a multibit
sigma-delta modulator already provides extremely low noise tone energy.
Master clock is from 256 or 384 times the input data rate, allowing choice of input data
rate up to 50 kHz, including standard audio rates of 48, 44.1, 32, 16 and 8 kHz.
The DAC section is followed by a volume and mute control and can be simultaneously
played back directly through a stereo 32 Ohm headset pair of drivers.
2744B–PMAAC–11-Apr-08
The stereo 32 Ohm headset pair of drivers also includes a mixer of a LINEL and LINER pair of
stereo inputs, as well as a differential monaural auxiliary input (line level).
The DAC output can be connected through a buffer stage to the input of the audio power ampli-
fier, using 2x coupling capacitors The mono buffer stage also includes a mixer of the LINEL and
LINER inputs, as well as a differential monaural auxiliary input (line level) which can be, for
example, the output of a voice Codec output driver in mobile phones.
The audio power amplifier is a dual-mode AB class amplifier with differential output and pro-
grammable volume control. In full power mode, it is capable of driving an 8-ohm loudspeaker at
maximum power of 1W at 5V supply and 440 mW at 3.6V supply. In low power mode, it can
drive the same loudspeaker as an earpiece, making it suitable as a handsfree speaker driver in
wireless handset application. The volume, mute, power down, de-emphasis controls and 16-bit,
18-bit and 20-bit audio formats are digitally programmable via a 4-wire SPI bus and the digital
audio data are provided through a multi-format I2S interface.
2. Block Diagram
Figure 2-1.
AT73C213 Functional Block Diagram
AUXG: -33 to +12dB in
3dB step
+20 dB and mute
MONO
VBAT
GNDB
PAINP
PAINN
VREF
AVDD
LPHN
HPN
HPP
CBP
AUXP
AT73C213
AUXN
LINER
PGA
LLIG: -33 to +12dB in
3dB step
+ 20dB and mute
Voltage
Reference
Audio PA
APAGAIN -22 to +20dB in
3dB step
Status
Registers
VDIG
SPI_DOUT
INGND
LINEL
PGA
RLIG: -33 to +12dB in
3dB step
+ 20dB and mute
SPI_DIN
SPI
SPI_CLK
SPI_CSB
LOLC: -6 to +6dB
in 3dB step
HSL
VCM
32
driver
+
DAC
LLOG: -46.5dB to 0dB
in 1.5dB step and mute
Volume
Control
+
LMPG: -34.5dB to +12dB
in 1.5dB step and mute
Volume
Control
MCLK
Serial Audio I/F
RSTB
SMODE
SDIN
LRFS
BCLK
Digital Filter
ROLC: -6 to +6dB
in 3dB
step
32
driver
HSR
AVDDHS
MONOP
MONO
MONON
+
DAC
Volume
Control
+
Volume
Control
Digital Filter
RLOG: -46.5dB to 0dB
in 1.5dB step and mute
+
RMPG: -34.5dB to +12dB
in 1.5dB step and mute
GNDD
2
AT73C213
2744B–PMAAC–11-Apr-08
AT73C213
3. Pin Description
Table 3-1.
Pin Name
LPHN
HPN
VBAT
HPP
CBP
PAINN
PAINP
SDIN
BCLK
LRFS
MCLK
RSTB
SMODE
GNDD
VDIG
SPI_DOUT
SPI_DIN
SPI_CLK
SPI_CSB
MONON
MONOP
AUXP
AUXN
VREF
AVDD
HSL
HSR
AVDDHS
LINEL
LINER
INGND
VCM
GNDB
Pin Description
I/O
O
O
I
O
O
I
I
I
I
I
I
I
I
GND
I
O
I/O
I
I
O
O
I
I
I
I
O
O
I
I
I
I
I
GND
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
33 (Bottom)
Type
Analog
Analog
Supply
Analog
Analog
Analog
Analog
Digital
Digital
Digital
Digital
Digital
Digital
Ground
Supply
Digital
Digital
Digital
Digital
Analog
Analog
Analog
Analog
Analog
Supply
Analog
Analog
Supply
Analog
Analog
Analog
Analog
Ground
Function
Low power audio stage output
Negative speaker output
Audio amplifier supply
Positive speaker output
Audio amplifier common mode voltage decoupling
Audio amplifier negative input
Audio amplifier positive input
Audio interface serial data input
Audio interface bit clock
Audio interface left/right channel synchronization frame pulse
Audio interface master clock input
Master reset (active low)
Serial interface selection (to connect to ground)
Digital ground
Digital supply
SPI data output
SPI data input
SPI clock
SPI chip select
Negative monaural driver output
Positive monaural driver output
Audio mono auxiliary positive input
Audio mono auxiliary negative input
Voltage reference pin for decoupling
Analog supply (DAC + Line in + Aux + Mono out)
Left channel headset driver output
Right channel headset driver output
Headset driver analog supply
Left channel line in
Right channel line in
Line signal ground pin for decoupling
Common mode reference for decoupling
Analog ground
3
2744B–PMAAC–11-Apr-08
4. Electrical Characteristics
Table 4-1.
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or other conditions beyond those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reli-
ability.
Operating Temperature (Industrial)-40°C to +85°C
Storage Temperature-55°C to +150°C
Power Supply Input
on VBAT-0.3V to +5.5V
on VDIG, AVDD-0.3V to +3.6V
5. Digital IOs
All the digital IOs: SDIN, BCLK, LRFS, MCLK, RSTB, SMODE, SPI_DOUT, SPI_DIN, SPI_CLK, SPI_CSB are referred to
as VDIG.
Table 5-1.
Symbol
VIL
VIH
VOL
VOH
Digital IOs
Parameter
Low level input voltage
High level input voltage
Low level output voltage
High level output voltage
Conditions
Guaranteed input low Voltage
Guaranteed input high Voltage
IOL = 2 mA
IOH = 2 mA
VDIG
from 2.4Vto 3.3 V
from 2.4Vto 3.3 V
from 2.4Vto 3.3 V
from 2.4Vto 3.3 V
VDIG - 0.5V
Min
-0.3
0.8 x VDIG
Max
0.2 x VDIG
VDIG + 0.3
0.4
Unit
V
V
V
V
4
AT73C213
2744B–PMAAC–11-Apr-08
AT73C213
6. Audio Power Amplifier
6.1
Electrical Specifications
VBAT = 3.6V, T
A
= 25°C unless otherwise noted. High power mode, 100 nF capacitor connected between CBP and GND
Audio, load = 8 Ohms.
Table 6-1.
Symbol
V
DD
I
DD
I
DDstby
V
Cbp
VOS
Z
IN
Z
LFP
Z
LLP
C
L
PSRR
BW
min
Audio Power Amplifier Electrical Specifications (General Conditions: V
DD
= 3.6V,T
A
= 25°C)
Parameter
Supply voltage
Quiescent current
Standby current
DC reference
Output differential offset
Input impedance
Output load
Output load
Capacitive load
Power supply rejection ratio
Low Frequency Cutoff
200 to 2 kHz differential output
1 kHz reference frequency
3 dB attenuation
470 nF input coupling capacitors
1 KHz reference frequency
3 dB attenuation
Off to on mode
Voltage already settled
Input capacitors precharged
Max gain, A weighted
High power mode, 1 kHz,
Pout = 100mW, gain = 0dB
Low power mode,1KHz, V
out = 100m Vpp, Max gain, load 8 ohms
in series with 200 ohms
High power mode, 1 KHz,
Vout = 100 mVpp, Max gain, load 8
ohms in series with 200 ohms
-2
-0.7
120
0.3
20
60
50
Full gain
Active state
Full Power mode
Low-Power mode, including R1
-20
12K
6
100
VDD/2
0
20k
8
150
20
30k
32
300
100
Conditions
Unloaded, 100 nF decoupling capacitor
to GND
Inputs shorted, no load
Min
3
Typ
3.6
6
Max
5.5
8
2
Unit
V
mA
µA
V
mV
Ohm
Ohm
Ohm
pF
dB
Hz
BW
max
High Frequency Cutoff
kHz
t
UP
V
N
THD
HP
Output setup time
Output noise
Output distortion
10
500
ms
µV
RMS
%
THD
LP
Output distortion
1
%
P
max
G
ACC
G
STEP
Maximum power
Overall Gain accuracy
Gain Step Accuracy
440
0
0
2
0.7
mW
dB
dB
5
2744B–PMAAC–11-Apr-08
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