CS56A16163MC-7 datasheet, PDF - EEWORLD Datasheet

CS56A16163MC-7: DescriptionSynchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, TSOP2-50; Categorystorage storage; File Size2MB，80 Pages; ManufacturerChiplus Semiconductor Corp

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CS56A16163MC-7 Overview

Synchronous DRAM, 1MX16, 5.5ns, CMOS, PDSO50, TSOP2-50

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	1164755652
package instruction	TSOP2-50
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	5.5 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	143 MHz
I/O type	COMMON
interleaved burst length	1,2,4,8
JESD-30 code	R-PDSO-G50
JESD-609 code	e0
length	20.95 mm
memory density	16777216 bit
Memory IC Type	SYNCHRONOUS DRAM
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of ports	1
Number of terminals	50
word count	1048576 words
character code	1000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSOP50,.46,32
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	235
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	2048
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	1,2,4,8,FP
Maximum standby current	0.002 A
Maximum slew rate	0.14 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
width	10.16 mm

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