PIC16CR83-10/P datasheet, PDF - EEWORLD Datasheet

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PIC16CR83-10/P: Description8-BIT, FLASH, 4 MHz, RISC MICROCONTROLLER, PDSO18; CategoryThe embedded processor and controller Microcontrollers and processors; File Size37KB，4 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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PIC16CR83-10/P Overview

8-BIT, FLASH, 4 MHz, RISC MICROCONTROLLER, PDSO18

PIC16CR83-10/P Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Microchip
Parts packaging code	DIP
package instruction	DIP, DIP18,.3
Contacts	18
Reach Compliance Code	compli
Has ADC	NO
Address bus width
bit size	8
CPU series	PIC
maximum clock frequency	10 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	R-PDIP-T18
JESD-609 code	e3
length	22.73 mm
Number of I/O lines	13
Number of terminals	18
On-chip program ROM width	14
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP18,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	36
rom(word)	512
ROM programmability	MROM
Maximum seat height	3.94 mm
speed	10 MHz
Maximum slew rate	10 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC
Base Number Matches	1

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PIC16F83

PIC16F83 Rev. A Silicon Errata Sheet

The PIC16F83 (Rev. A) parts you have received conform

functionally to the Device Data Sheet (DS30430

except for the anomalies described below.

All the problems listed here will be addressed in future

revisions of the PIC16F83 silicon.

Module: CPU (STATUS bit)

The operation of the power-down (PD) bit in the STA-

TUS register may not function correctly for tempera-

tures below - 20 ˚C.

Work Around

None

Module: Data EEPROM

Do not perform a modify (set or clear a bit) of the

EECON1 register one instruction cycle after an

EEPROM read. This will corrupt the EEDATA regis-

ter.

Example:

BSF

BCF

EECON1, RD

EECON1, WREN

Module: Timer0

The TMR0 register may increment when the WDT

postscaler is switched to the Timer0 prescaler. If

TMR0 = FFh, this will cause TMR0 to overﬂow (set-

ting T0IF).

Work Around

Follow the following sequence:

Read the 8-bit TMR0 register into the W register

Clear the TMR0 register

Assign WDT postscaler to Timer0

Write W register to TMR0

Work Around

Use either of the following two code segment in place

of the above example.

BSF

NOP

BCF

EECON1, RD

EECON1, WREN

BCF

BSF

EECON1, WREN

EECON1, RD

Note:

As with any windowed EPROM device, please cover the window at all times, except when erasing.

1998 Microchip Technology Inc.

DS30430C/F83/E1A1-page 1

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