70T25L25PF8 datasheet, PDF - EEWORLD Datasheet

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70T25L25PF8: DescriptionTQFP-100, Reel; Categorystorage storage; File Size441KB，22 Pages; ManufacturerIDT (Integrated Device Technology)

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70T25L25PF8 Overview

TQFP-100, Reel

70T25L25PF8 Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	TQFP
package instruction	PLASTIC, TQFP-100
Contacts	100
Manufacturer packaging code	PN100
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	25 ns
JESD-30 code	S-PQFP-G100
JESD-609 code	e0
length	14 mm
memory density	131072 bit
Memory IC Type	DUAL-PORT SRAM
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of terminals	100
word count	8192 words
character code	8000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8KX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	2.6 V
Minimum supply voltage (Vsup)	2.4 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	14 mm
Base Number Matches	1

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HIGH-SPEED 2.5V

8/4K x 18 DUAL-PORT

8/4K x 16 DUAL-PORT

STATIC RAM

◆

PRELIMINARY

IDT70T25/24L

IDT70T35/34L

OBSOLETE PARTS

Features

◆

True Dual-Ported memory cells which allow simultaneous

reads of the same memory location

High-speed access

IDT70T35/34L (IDT70T25/24L)

– Commercial: 20/25ns (max.)

– Industrial: 25ns (max.)

Low-power operation

– IDT70T35/34L (IDT70T25/24L)

Active: 200mW (typ.)

Standby: 600

W (typ.)

Separate upper-byte and lower-byte control for multiplexed

bus compatibility

IDT70T35/34L (IDT70T25/24L) easily expands data bus

width to 36 bits (32 bits) or more using the Master/Slave

◆

Functional Block Diagram

R/W

I/O

-I/O

17L

(5)

I/O

-I/O

(4)

BUSY

12L

(1)

S OR

T F

A D

P E

E ND S

T E

L M IG

O M S

S O

B C

O E

R EW

T N

◆

select when cascading more than one device

M/S = V

for

BUSY

output flag on Master

M/S = V

for

BUSY

input on Slave

BUSY

and Interrupt Flag

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

LVTTL-compatible, single 2.5V (±100mV) power supply

Available in a 100-pin Thin Quad Flatpack (TQFP) package

and 100-pin fine pitch Ball Grid Array (fpBGA)

Industrial temperature range (-40°C to +85°C) is available

for selected speeds

R/W

I/O

-I/O

17R

(5)

I/O

-I/O

(4)

BUSY

(2,3)

12R

(1)

I/O

Control

I/O

Control

(2,3)

Address

Decoder

MEMORY

ARRAY

Address

Decoder

R/W

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

R/W

SEM

INT

(3)

NOTES:

1. A

is a NC for IDT70T34 and IDT70T24.

2. (MASTER):

BUSY

is output; (SLAVE):

BUSY

is input.

BUSY

outputs and

INT

outputs are non-tri-stated push-pull.

4. I/O

x - I/O

x for IDT70T25/24.

5. I/O

x - I/O

x for IDT70T25/24.

M/S

SEM

INT

(3)

5639 drw 01

JANUARY 2009

DSC-5639/3

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