AB-100.0100MHZ-S-D1Z-Q10-O5-T datasheet, PDF

Datasheet> All Categories > Passive components> Crystal/resonator> AB-100.0100MHZ-S-D1Z-Q10-O5-T

AB-100.0100MHZ-S-D1Z-Q10-O5-T: DescriptionSeries - 5Th Overtone Quartz Crystal, 100.01MHz Nom, HC49/U, 2 PIN; CategoryPassive components Crystal/resonator; File Size2MB，4 Pages; ManufacturerAbracon; Websitehttp://www.abracon.com/index.htm; Environmental Compliance

Download Datasheet Parametric View All

AB-100.0100MHZ-S-D1Z-Q10-O5-T Overview

Series - 5Th Overtone Quartz Crystal, 100.01MHz Nom, HC49/U, 2 PIN

AB-100.0100MHZ-S-D1Z-Q10-O5-T Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	1349095080
package instruction	HC49/U, 2 PIN
Reach Compliance Code	compliant
Country Of Origin	Mainland China
YTEOL	6.32
Other features	TR, 13 INCH
Ageing	5 PPM/FIRST YEAR
Crystal/Resonator Type	SERIES - 5TH OVERTONE
Drive level	100 µW
frequency stability	0.005%
frequency tolerance	10 ppm
JESD-609 code	e3
Installation features	THROUGH HOLE MOUNT
Nominal operating frequency	100.01 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
physical size	L11.5XB5.0XH13.46 (mm)/L0.453XB0.197XH0.53 (inch)
Series resistance	80 Ω
surface mount	NO
Terminal surface	Matte Tin (Sn) - with Nickel (Ni) barrier

Preview

Download Datasheet

View All

HC49/U Crystal

FEATURES:

• High precision availability

• Resistance welded

• Ideal for large pullability application

• Wide frequency range

RoHS

Compliant

APPLICATIONS:

• CPU, Memory

• Computer, printer

• Data communication (1MHz)

• Data input - output machine (1MHz)

11.5 x 5.0 x 13.46mm

| | | | | | | | | | | | | | |

STANDARD SPECIFICATIONS:

Parameters

Frequency Range

Operation Mode

Operating Temperature

Storage Temperature

Frequency Tolerance @+25°C

Frequency Stability over the

Operating temperature

(

ref. to

+25°C)

Equivalent series resistance

(R1)

Shunt capacitance

(C0)

Load capacitance

(CL)

Drive Level

Aging@25°C±3°C

Insulation Resistance

Drive level

dependency (DLD),

minimum 7 points tested: from

1µW to 500µW.

-55

-50

-100

Minimum

1.8432

Typical

Maximum

Units

MHz

Notes

HC49/U

1.8432MHz – 40.000MHz

20.00MHz – 100.00MHz

100.00MHz – 150.00MHz

120.00MHz – 200.00MHz

See options

-----

40.000

Fundamental

Overtone

-----

+70

-----

+125

-----

+50

-----

+100

ºC

ppm

See table 1 below

Ω

-----

100

1000

µW

-----

±5

ppm

500

-----

Ω

Change in frequency

(Maximum

- Minimum) over

DLD range < ±10ppm;

Change in ESR

(Maximum

- Minimum) over DLD

range < 25% of Max ESR

value;

Maximum ESR over DLD range < Max ESR

value.

See options

First

year

@100Vdc±15V

Table 1

FREQUENCY

1.8432MHz - 1.999MHz

2.000MHz - 2.399MHz

2.400MHz - 2.999MHz

3.000MHz - 3.699MHz

3.700MHz - 4.199MHz

4.200MHz - 4.899MHz

4.900MHz - 5.999MHz

6.000MHz - 7.999MHz

8.000MHz - 9.999MHz

10.000MHz - 12.499MHz

12.50MHz - 40.00MHz

20.00MHz - 100.00MHz

100.01MHz - 150.00MHz

120.00MHz – 200.00MHz

Operation Mode

ESR (Ω) max

750

550

350

200

100

120

Fundamental

3rd OT

5th OT

7th OT

ABRACON IS

ISO 9001:2008

ISO 9001 / QS 9000

CERTIFIED

Revised: 08.28.12

30332 Esperanza, Rancho Santa Margarita, California 92688

tel 949-546-8000

fax 949-546-8001

| www.abracon.com

Visit www.abracon.com for Terms & Conditions of Sale

Recommended Resources

LED light column drive circuit

Egg warming circuit

Switching power supply control module HK02 circuit-internal circuit

M708 (TV) infrared remote control transmitter circuit

TL431 and 7805 form an adjustable regulated power supply circuit diagram

TL494 internal equivalent circuit diagram

Can the PLL output be connected to a normal IO port by setting global clock constraints?: I am doing a course design recently. When reading sdram, I use pll to multiply the frequency to generate sdram clock (100M). However, I found that the sdram interface of the board at hand is a common ...; seaundersky FPGA/CPLD

Digital timer: This is a digital timer used on the test bench. Take it apart and see what the internal structure is like. It is actually quite simple. The key component is the circuit board, as shown below...; shakencity Making friends through disassembly

Regarding the phenomenon that the EZ430-Chronos watch sometimes restarts after pressing a button (it may not be a device or software problem): Regarding the phenomenon that EZ430-Chronos sometimes restarts after pressing a button, I have also encountered this situation before. I saw a similar phenomenon in the post, so I thought it might be ...; wangfuchong Microcontroller MCU

Does anyone know how to make an amplifier circuit for a frequency meter?: Which friend has made an amplifier circuit for a frequency meter? How to use THS3201?...; 顽皮小孩儿 Electronics Design Contest

【MicroPython】ESP8266 Tutorials and Resources: [i=s]This post was last edited by dcexpert on 2016-11-9 12:50[/i] This post will collect and organize MicroPython resources, tutorials, posts, etc. related to ESP8266 in the forum. [b]Tutorials[/b][li...; dcexpert MicroPython Open Source section

Can anyone help me analyze this circuit?: StartFragmentWhat is the function of the capacitor connected to the reverse input and output terminals of the OPA336 on the upper left?...; hyhhao1000 Analog electronics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components