21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT3805/PI49FCT3806
PI49FCT3805A/PI49FCT3806A
PI49FCT3805B/PI49FCT3806B
PI49FCT3805C/PI49FCT3806C
3.3V Fast CMOS Buffer/Clock Driver
Features
Product Description
Pericom Semiconductors PI49FCT series of logic circuits are
produced using the Companys advanced submicron CMOS
technology, achieving industry leading speed grades.
The PI49FCT3805 is a 3.3V non-inverting clock driver and the
PI49FCT3806 is a 3.3V inverting clock driver designed with two
independent groups of buffers. These buffers have 3-state Output
Enable inputs (active LOW) with a 1-in, 5-out configuration per
group. Each clock driver consist of two banks of drivers, driving five
outputs each from a standard TTL compatible CMOS input.
3.3V version of PI49FCT805/806
Extremely low output skew: 0.5ns
Monitor ouput pin
Clock busing wih 3-state control
TTL inpu and CMOS output compatible
Industrial operation at40°C to 85°C
Extremely low static power (1mW, typ.)
Hysteresis on all inputs
Packages available:
20-pin 300-mil wide SOIC (S)
20-pin 150-mil wide QSOP (Q)
20-pin 209-mil wide SSOP (H)
Device models available on request
PI49FCT3805 Logic Block Diagram
PI49FCT3806 Logic Block Diagram
OE
A
IN
A
5
OA
0-4
OE
A
IN
A
5
OA
0-4
IN
B
OE
B
5
OB
0-4
IN
B
OE
B
5
OB
0-4
MON
MON
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PI49FCT3805 Product Pin Configuration
V
CCA
OA
0
OA
1
OA
2
GND
A
OA
3
OA
4
GND
Q
OE
A
IN
A
PI49FCT3806 Product Pin Configuration
V
CCA
OA
0
OA
1
OA
2
GND
A
OA
3
OA
4
GND
Q
OE
A
IN
A
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Product Pin Description
Pin Name
OE
A,
OE
B
IN
A,
IN
B
OA
N,
OB
N
MON
GND
V
CC
Description
3-State Output Enable Inputs (Active LOW)
Clock Inputs
Clock Outputs
Monitor Output
Ground
Power
PI49FCT3805 Truth Table
(1)
Inputs
OE
A
, OE
B
L
L
H
H
IN
A
, IN
B
L
H
L
H
Outputs
OA
N
, OB
N
MON
L
L
H
Z
Z
H
L
H
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
PI49FCT3806 Truth Table
(1)
Inputs
OE
A
, OE
B
L
L
H
H
IN
A
, IN
B
L
H
L
H
Outputs
OA
N
, OB
N
MON
H
H
L
L
Z
H
Z
L
1
20
2
19
3
18
4
17
20-Pin
5
16
H20
Q20
6
15
S20
7
14
8
13
9
12
10
11
V
CCB
OB
0
OB
1
OB
2
GND
B
OB
3
OB
4
MON
OE
B
IN
B
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
1
20
2
19
3
18
4
17
20-Pin
5
16
H20
6
Q 2 0
15
S 2 0
14
7
8
13
9
12
10
11
V
CCB
OB
0
OB
1
OB
2
GND
B
OB
3
OB
4
MON
OE
B
IN
B
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(1)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
4.5
5.5
Max.
6.0
8.0
Units
pF
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
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PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied .............................. –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ......... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & I/O Only) ....... –0.5V to +7.0V
DC Input Voltage ....................................................................... –0.5V to +7.0V
DC Output Current ................................................................................ 120 mA
Power Dissipation .................................................................................... 0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Operating Range
Ambient Temperature = –40°C to +85°C, Vcc = 3.3V ±0.3V
DC Electrical Characteristics
(Over the Operating Range)
Symbol
V
O H
V
O L
De s cription
Output HIGH voltage
Output LOW voltage
Te s t Conditions
(1)
V
C C
= 1.5V, V
IN
= V
IH
or V
IL
V
C C
= 1.5V, V
IN
= V
IH
or V
IL
I
O H
= 0.1mA
I
O H
= 8mA
I
O L
= 0.1mA
I
O L
= 16mA
I
O L
= 24mA
Input Pins
Input Pins
V
IN
= V
C C
(Input Pins)
V
IN
= GND (Input
& I/O Pins)
V
O UT
= V
C C
V
O UT
= GND
M in.
V
C C
- 0.2
2.4
(3)
2.0
0.5
35
50
60
Typ.
(2)
3.0
0.2
0.3
0.7
60
90
135
150
M ax.
0.2
0.4
0.5
5.5
0.8
1
1
1
1
1.2
110
200
240
mV
mA
V
µA
V
Units
V
IH
V
IL
I
IH
I
IL
I
OZH
I
O ZL
V
IK
I
O DH
I
O DL
I
O S
V
H
Input HIGH voltage
Input LOW voltage
Input HIGH current
Input LOW current
High impedance
Output Current
Clamp diode voltage
Output HIGH current
Output LOW current
Short circuit current
(5)
Input Hysteresis
Guaranteed Logic HIGH level
Guaranteed Logic LOW level
V
C C
= Max.
V
C C
= Max.
V
C C
= Max
(3- State Output Pins)
V
C C
= Min., I
IN
= 18mA
V
C C
= 3.3V, V
IN
= V
IH
or V
IL,
V
O UT
= 1.5V
(4)
V
C C
= 3.3V, V
IN
= V
IH
or V
IL,
V
O UT
= 1.5V
(4)
V
C C
= Max.,V
O UT
= GND
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3. V
OH
= V
CC
– 0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
3
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PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Inputs @ TTL HIGH
Supply Current per
Input per MHz
(4)
Test Conditions
(1)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.,
Outputs Open
OE
A
or OE
B
= GND
Per Output Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
O
= 10 MH
Z
50% Duty Cycle
OE
A
or OE
B
= GND
Mon. Outputs Toggling
V
CC
= Max.,
Outputs Open
f
O
= 2.5 MH
Z
50% Duty Cycle
OE
A
or OE
B
= GND
Eleven Outputs Toggling
V
IN
= GND or V
CC
V
IN
= V
CC
– 0.6V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
—
—
—
Typ
(2)
3
2.0
0.08
Max.
30
300
0.16
Units
µA
µA
mA/
MH
Z
I
C
Total Power Supply
Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
– 0.6V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
– 0.6V
V
IN
= GND
—
3.3
9.0
(5)
—
3.3
10.0
(5)
mA
—
1.8
6.0
(5)
—
1.8
7.0
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input (V
IN
= V
CC
0.6V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= V
CC
0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Switching Characteristics over Operating Range
3805/3806
Parame te rs
De s cription
Condition
(1)
Com.
M in.
M ax
6.5
8.0
7.0
0.7
3805A/3806A
Com.
M in.
1.5
1.5
1.5
M ax
5.8
8.0
7.0
0.7
3805B/3806B
Com.
M in.
1.5
1.5
1.5
M ax
5.0
6.5
6.0
0.5
3805C/3806C
Com.
M in.
1.5
1.5
1.5
M ax
4.5
6.2
5.0
0.5
ns
Units
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK (o)(3)
t
SK (p)(3)
Propagation Delay
IN
A
to OA
N ,
IN
B
to OB
N
Output Enable Time
OE
A
to OA
N
, OE
B
to OB
N
Output Disable Time
OE
A
to OA
N
, OE
B
to OB
N
Skew between two outputs of
same package (Same transition)
Skew between opposite
transition (t
PHL
- t
PLH
) of the
same output
Skew between two outputs of
different package at same
temperature (Same transition)
C
L
= 50pF
R
L
= 500
Ω
1.5
1.5
1.5
1.0
0.7
0.5
0.5
t
SK (t)
(3 )
1.5
1.2
1.0
0.8
Note:
1. See test circuit and waveforms
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worst cast temperature (max. temp).
Tests Circuits for All Outputs
(1)
, except for F
IN
>100 MHz
6.0V
Switch Position
Test
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
Switch
6V
GND
Open
V
CC
500
V
IN
Pulse
Generator
D.U.T.
V
OUT
Ω
All Other Inputs
50pF
R
T
C
L
500
Ω
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe
capacitance.
R
T
= Termination resistance: should be equal to
Z
OUT
of the Pulse Generator.
5
PS7007B
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