EEWORLDEEWORLDEEWORLD

Part Number

Search

JB7-Q107-21-0

Description
Terminal and Terminal Block,
CategoryThe connector   
File Size683KB,2 Pages
ManufacturerBlockMaster Blocks
Environmental Compliance
Download Datasheet Parametric View All

JB7-Q107-21-0 Overview

Terminal and Terminal Block,

JB7-Q107-21-0 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid145181529890
Reach Compliance Codecompliant
ECCN codeEAR99
Terminal and terminal strip typesBARRIER STRIP TERMINAL BLOCK

JB7-Q107-21-0 Preview

1400 Howard Street
Elk Grove Village, IL 60007
Phone: (800) 595-8881
www.BLOCKMASTER.com
JB7 Series Data Sheet
Modular, Color-Coded Terminal Blocks
Modular, Color-Coded
Terminal Blocks
Never content to sell the same old blocks, we at BlockMaster
have pushed the envelope yet again with another innovative
series. This time
we’re
targeting a very important segment of
our customer base: the field engineers.
We’re
sure
they’ll
be
happy to know that with our two lines of Jelly Beans terminal
blocks,
they’ll
never again have to worry about the age-old
problem of incorrect field wiring. Both products can have a
different color for each position, helping to eliminate
installation mistakes.
The JB Series are modular, barrier-style terminal blocks that
offer the ability to
color-code each terminal to match
customer wiring. This allows for the separation of line voltage
from signal inputs and outputs. Single circuit modules snap
together to form nearly infinite circuit configurations, and each
position can be any of ten available colors. Standard design
features include break-resistant barriers, standoffs for flux
cleaning, and ready-to-wire screws. A full range of terminal
configurations are offered on industry standard center-to-center
spacings of 7/16” (0.437” or 11.1 mm).
Eliminate the Problem of
Field Installation
Mistakes!
JB7 Series
JB Series: Modular,
Barrier-Style Blocks
Terminal Styles
Features
Modular construction for customer-specified length
10 Colors available for color-coding applications
Standoffs for improved flux removal
7/16” Centers (0.437”/11.1 mm)
UL Recognized
20A at 600V
Wire-ready; raised screws for 12AWG to 22AWG wire
1400 Howard Street
Elk Grove Village, IL 60007
Phone: (800) 595-8881
www.BLOCKMASTER.com
JB7 Series Data Sheet
Modular, Color-Coded Terminal Blocks
Specifications
Housing Material: Thermoplastic polyamide, UL 94V-0,
130⁰
max. operating temperature
Terminals:
Brass, bright tin over copper plating
Screws:
#6-32 steel, zinc plating with clear chromate
coating undercut binding head
Rating:
20A, 600V
Wire Range:
12-22 AWG
SIZE
JB7
B
C
D
X
Y
Z
17.8
(0.70)
20.3
(0.80)
3.1
(0.12)
11.1
(.437)
7.1
(0.28)
4.7
(0.19)
JB7 Series
Printed Circuit Board Layout
L=A + 2X
(N) - # of
Positions
A
(Inches)
(0.437)
(0.875)
(1.313)
(1.750)
(2.188)
(2.625)
(3.063)
(3.500)
(3.937)
(4.375)
(4.813)
(4.813)
A
mm
11.1
22.2
33.3
44.4
55.6
66.7
77.8
88.9
100
111.1
122.2
133.3
(N) - # of
Positions
14
15
16
17
18
19
20
21
22
23
24
A
(Inches)
(5.688)
(6.125)
(6.563)
(7.000)
(7.438)
(7.875)
(8.313)
(8.750)
(9.188)
(9.625)
(10.063)
A
mm
144.5
155.6
166.7
177.8
188.9
200
211.1
222.2
233.4
244.5
255.6
How to Order
2
3
4
5
6
7
8
9
10
11
12
13
Accessories
Different 51 tutorials 5 Write a real... small program
Earlier, I finished talking about the addressing mode and instruction system of the 51 microcontroller, as well as several basic internal resources that the traditional 8051 has (the so-called traditi...
辛昕 51mcu
nioss problem
I have built a NIOSS2 minimum system. The hardware platform was compiled successfully. The software used was HELLO_LED in the template. After compiling, it was downloaded into the FPGA, but it did not...
wenhuawu FPGA/CPLD
lwip implements GPRS communication example code
My platform is S3C2410 (ucos-ii) + MC35I. I have ported LWIP1.3.1 on UCOS, but I don't know how to use the given functions in LWIP1.3.1 to implement GPRS communication. Does anyone have relevant code ...
cgl123456 Embedded System
Verilog
Does anyone have an ALU example designed in Verilog? Please give me one (not copied from the Internet)...
1520415739 FPGA/CPLD
Weird LoadImage() failure
I am using WinCE5.0, and I add my own images to explorebase.rc for HPC. a. If the image is generated by sysgen or build sysgen, when I execute LoadImage, it fails and GetLastError() returns 1814. b. I...
sujd_01 Embedded System
[Bluesun AB32VG1 RISC-V development board] Evaluation environment construction
I have been exposed to arm chips in my work and study. In recent years, risc-v has been popular and I have always been interested in it. I took advantage of the forum activities to apply for a Zhongke...
wanyisq Domestic Chip Exchange

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1223  2770  2781  2677  1830  25  56  54  37  28 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号