log converters that are designed and specified for
digital audio applications. These devices employ ul-
tra-stable nichrome (NiCr) thin-film resistors to pro-
vide monotonicity, low distortion, and low differential
linearity error (especially around bipolar zero) over
long periods of time and over the full operating
temperature.
These converters are completely self-contained with a
stable, low noise, internal, zener voltage reference;
high speed current switches; a resistor ladder
network; and a fast settling, low noise output opera-
tional amplifier all on a single monolithic chip. The
converters are operated using two power supplies that
Reference
Voltage
R
F
can range from
±5V
(PCM55) to
±12V
(PCM54).
Power dissipation with
±5V
supplies is typically less
than 200mW. Also included is a provision for exter-
nal adjustment of the MSB error (differential linearity
error at bipolar zero, PCM54 only) to further improve
Total Harmonic Distortion (THD) specifications if
desired.
A current output (I
OUT
) wiring option is provided. This
output typically settles to within
±0.006%
of FSR
final value in 350ns (in response to a full-scale change
in the digital input code).
The PCM54 is packaged in 28-pin plastic DIP pack-
age. The PCM55 is available in a 24-lead plastic mini-
flatpak.
Parallel
Digital
Input
16-Bit Ladder
Resistor Network
and
Current Switches
Output
Operational
Amplifier
Audio Output
(Voltage)
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
NOTES: (1) Externally adjustable. If external adjustment is not used, connect a 0.01µF capacitor to Common to reduce noise pickup. (2) FSR means Full-Scale Range
and is 6V for
±3V
output. (3) The measurement of total harmonic distortion is highly dependent on the characteristics of the measurement circuit. Burr-Brown may
calculate THD from the measured linearity errors using Equation 2 in the section on “Total Harmonic Distortion,” but specifies that the maximum THD measured with
the circuit shown in Figure 2 will be less than the limits indicated. (4) Measured with an active clamp to provide a low impedance for approximately 200ns. (5) Deglitcher
or sample/hold delay used in THD measurement test circuit. See Figures 2 and 3. (6) Output amplifier disconnected.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
PCM54/55
2
CONNECTION DIAGRAMS
PCM54
(Optional)
560kΩ
100kΩ
330kΩ
PCM55
(1)
1MΩ
–V
CC
1
24
Zener
Voltage
Reference
16-Bit
Ladder
Resistor
Network
and
Switches
23
(1)
1
2
3
4
5
6
16-Bit
Ladder
Resistor
Network
and
Switches
Zener
Voltage
Reference
28
–V
CC
27
+V
CC
26
(2)
2
3
4
+V
CC
1µF
+
+
1µF
22
21
20
0.1µF
24
23
22
+
1µF
1µF
+
Data Inputs
25
5
6
7
8
Common
19
18
17
16
15
14
13
Data
Inputs
(2)
(2)
Data Inputs
7
8
9
10
11
12
13
14
Audio
V
OUT
Common
21
(3)
9
10
20
19
18
17
16
15
Data
Inputs
Audio
V
OUT
11
12
NOTES: (1) Connect for bipolar operation. (+V
CC
≥
8.5V for unipolar operation.)
(2) Connect for V
OUT
operation. When V
OUT
amp is not being used (I
OUT
mode),
terminate with an external 3kΩ feedback resistor between pin 17 and pin 19, and
a 1kΩ resistor between pin 19 and pin 20 to reduce possible noise effects.
NOTES: (1) MSB error (BPZ differential linearity error) can be adjusted to zero
using this external circuit. (2) Connect to bipolar operation (+V
CC
≥
8.5V for
unipolar operation). (3) Connect for V
OUT
operation. When V
OUT
amp is not being
used (I
OUT
mode), terminate with an external 3kΩ feedback resistor between pin
19 and pin 21, and a 1kΩ resistor between pin 21 and pin 22 to reduce possible
noise effects.
PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PCM54-DIP
Trim
Bit 1 (MSB)
Bit 2
NC
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
PIN
15
16
17
18
19
20
21
22
23
24
25
26
27
28
PCM54-DIP
Bit 13
Bit 14
Bit 15
Bit 16 (LSB)
V
OUT
R
FB
SJ
Common
I
OUT
NC
I
BPO
+V
CC
MSB Adjust
–V
CC
PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
PCM55-SOIC
Bit 1 (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
PIN
13
14
15
16
17
18
19
20
21
22
23
24
PCM55-SOIC
Bit 13
Bit 14
Bit 15
Bit 16
V
OUT
Feedback Resistor
Summing Junction
Common
Current Output
Bipolar Offset
+V
CC
–V
CC
ABSOLUTE MAXIMUM RATINGS
PACKAGE INFORMATION
PRODUCT
PCM54HP
PCM54JP
PCM54KP
PCM55HP
PCM55JP
PACKAGE
28-Pin
28-Pin
28-Pin
24-Lead
24-Lead
DIP
DIP
DIP
SOIC
SOIC
PACKAGE DRAWING
NUMBER
(1)
215
215
215
178
178
DC Supply Voltage ......................................................................
±18VDC
Input Logic Voltage ............................................................... –1V to +5.5V
Power Dissipation .................................. PCM54 800mW, PCM55 400mW
Storage Temperature ...................................................... –55°C to +100°C
Lead Temperature, (soldering, 10s) .............................................. +300°C
ORDERING INFORMATION
PRODUCT
PCM54HP
PCM54JP
PCM54KP
PCM55HP
PCM55JP
THD at FS
0.008
0.004
0.0025
0.008
0.004
PACKAGE
28-Pin DIP
28-Pin DIP
28-Pin DIP
24-Lead SOIC
24-Lead SOIC
®
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
3
PCM54/55
DISCUSSION OF
SPECIFICATIONS
The PCM54 and PCM55 are specified to provide critical
performance criteria for a wide variety of applications. The
most critical specifications for a D/A converter in audio
applications are total harmonic distortion, differential linear-
ity error, bipolar zero error, parameter shifts with time and
temperature, and settling time effects on accuracy.
The PCM54 and PCM55 are factory-trimmed and tested for
all critical key specifications.
The accuracy of a D/A converter is described by the transfer
function shown in Figure 1. Digital input to analog output
relationship is shown in Table I. The errors in the D/A
converter are combinations of analog errors due to the linear
circuitry, matching and tracking properties of the ladder and
scaling networks, power supply rejection, and reference
errors. In summary, these errors consist of initial errors
including gain, offset, linearity, differential linearity, and
power supply sensitivity. Gain drift over temperature rotates
the line (Figure 1) about the bipolar zero point and offset
drift shifts the line left or right over the operating tempera-
ture range. Most of the offset and gain drift with temperature
or time is due to the drift of the internal reference zener
diode. The converter is designed so that these drifts are in
opposite directions. This way, the bipolar zero voltage is
virtually unaffected by variations in the reference voltage.
DIGITAL INPUT CODES
The PCM54 and PCM55 accept complementary digital
input codes in any of three binary formats (CSB, unipolar; or
COB, bipolar; or CTC, Complementary Two’s Comple-
ment, bipolar). See Table II.
ANALOG OUTPUT
Digital
Input
Codes
0000
H
7FFF
H
8000
H
FFFF
H
Complementary
Straight Binary
(CSB)
+Full Scale
+1/2 Full Scale
+1/2 Full Scale
–1LSB
Zero
Complementary
Offset Binary
(COB)
+Full Scale
Bipolar Zero
–1LSB
–Full Scale
Complementary
Two’s Complement
(CTS)
(1)
–1LSB
–Full Scale
+Full Scale
Bipolar Zero
NOTE: (1) Invert the MSB of the COB code with an external inverter to obtain
CTC code.
0000…0000
0000…0001
0111…1101
Digital Input
0111…1110
0111…1111
1000…0000
1000…0001
1111…1110
1111…1111
Offset
Drift
Bipolar
Zero
Gain
Drift
All Bits
On
TABLE II. Digital Input Codes.
BIPOLAR ZERO ERROR
Initial Bipolar Zero (BPZ) error (Bit 1 “ON” and all other
bits “OFF”) is the deviation from 0V out and is factory-
trimmed to typically
±10mV
at +25°C.
DIFFERENTIAL LINEARITY ERROR
Differential Linearity Error (DLE) is the deviation from an
ideal 1LSB change from one adjacent output state to the
next. DLE is important in audio applications because exces-
sive DLE at bipolar zero (at the “major carry”) can result in
audible crossover distortion for low level output signals.
Initial DLE on the PCM54 and PCM55 is factory-trimmed
to typically
±0.001%
of FSR. This error is adjustable to zero
using the circuit shown in the connection diagram (PCM54
only).
–FSR/2
Analog Output
(+FSR/2) –1LSB
* See Table I for digital code definitions.
FIGURE 1. Input vs Output for an Ideal Bipolar D/A
Converter.
VOLTAGE OUTPUT MODE
Analog Output
Unipolar
(1)
Digital Input Code
One LSB
0000
H
FFFF
H
(µV)
(V)
(V)
16-Bit
91.6
+5.99991
0
15-Bit
183
+5.99982
0
14-Bit
366
+5.99963
0
16-Bit
91.6
+2.99991
–3.0000
Bipolar
15-Bit
183
+2.99982
–3.0000
14-Bit
366
+2.99963
–3.0000
CURRENT OUTPUT MODE
Analog Output
Unipolar
Digital Input Code
One LSB
0000
H
FFFF
H
(µA)
(mA)
(mA)
16-Bit
0.031
–1.99997
0
15-Bit
0.061
–1.99994
0
14-Bit
0.122
–1.99988
0
16-Bit
0.031
–0.99997
+1.00000
Bipolar
15-Bit
0.061
–0.99994
+1.00000
14-Bit
0.122
–0.99988
+1.00000
NOTE: (1) +V
CC
must be at least +8.5VDC to allow output to swing to +6.0VDC.
TABLE I. Digital Input to Analog Output Relationship.
®
PCM54/55
4
POWER SUPPLY SENSITIVITY
Changes in the DC power supplies will affect accuracy.
The PCM54 and PCM55 power supply sensitivity is shown
by Figure 2. Normally, regulated power supplies with 1% or
less ripple are recommended for use with the DAC. See also
Power Supply Connections paragraph in the Installation and
Operating Instructions section.
STABILITY WITH TIME AND TEMPERATURE
The parameters of a D/A converter designed for audio
applications should be stable over a relatively wide tempera-
ture range and over long periods of time to avoid undesirable
periodic readjustment. The most important parameters are
bipolar zero, differential linearity error, and total harmonic
distortion. Most of the offset and gain drift with temperature
or time is due to the drift of the internal reference zener
diode. The PCM54 and PCM55 are designed so that these
drifts are in opposite directions so that the bipolar zero
voltage is virtually unaffected by variations in the reference
voltage. Both DLE and THD are dependent upon the match-
ing and tracking of resistor ratios and upon V
BE
and h
FE
of
the current-source transistors. The PCM54 and PCM55 were
designed so that any absolute shift in these components has
virtually no effect on DLE or THD. The resistors are made
of identical links of ultra-stable nichrome thin-film. The
current density in these resistors is very low to further
enhance their stability.
DYNAMIC RANGE
The dynamic range is a measure of the ratio of the smallest
signals the converter can produce to the full-scale range and
is usually expressed in decibels (dB). The theoretical dy-
namic range of a converter is approximately 6 x n, or about
96dB for a 16-bit converter. The actual, or useful, dynamic
range is limited by noise and linearity errors and is therefore
somewhat less than the theoretical limit. However, this does
point out that a resolution of at least 16 bits is required to
obtain a 90dB minimum dynamic range, regardless of the
accuracy of the converter. Another specification that is
useful for audio applications is total harmonic distortion.
TOTAL HARMONIC DISTORTION
THD is useful in audio applications and is a measure of the
magnitude and distribution of the linearity error, differential
linearity error, and noise as well as quantization error. To be
useful, THD should be specified for both high level and low
level input signals. This error is unadjustable and is the most
meaningful indicator of D/A converter accuracy for audio
applications.
The THD is defined as the ratio of the square root of the sum
of the squares of the values of the harmonics to the value of
the fundamental input frequency and is expressed in percent
or dB. The rms value of the PCM54/55 error referred to the
input can be shown to be:
(1)
10.0
3.0
1.0
THD (%)
–60dB
0.30
0.10
0.03
0.01
0.003
0.001
5
10
15
0dB
–20dB
±V
CC
Supplies (V)
FIGURE 2. Effects of
±V
CC
on Total Harmonic Distortion
(PCM54JP; V
CC
s with approximately 2% ripple).
SETTLING TIME
Settling time is the total time (including slew time) required
for the output to settle within an error band around its final
value after a change in input (see Figure 3).
Settling times are specified to
±0.006%
of FSR; one for a
large output voltage change of 3V and one for a 1LSB
change. The 1LSB change is measured at the major carry
(0111…11 to 10000.00), the point at which the worst-case
settling time occurs.
Accuracy Percent Full-Scale Range (%)
1.0
0.3
0.1
0.03
0.01
R
L
= 200Ω
0.003
0.001
0.01
0.1
1.0
Settling Time (µs)
10.0
Current
Output
Mode
Voltage
Output
Mode
ε
rms
=
1
n
n
Σ
[
Ε
L
( i )
i
=
1
+ Ε
Q
(i)]
2
FIGURE 3. Full-Scale Range Settling Time vs Accuracy.
where n is the number of samples in one cycle of any given
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