with an integrated power-down mode, make it ideal for
portable applications.
The PCM3501 integrates all of the functions needed for
a modem or voice CODEC, including delta-sigma
digital-to-analog and analog-to-digital converters, in-
put anti-aliasing filter, digital high-pass filter for DC
blocking, and an output low-pass filter. The synchro-
nous serial interface provides for a simple, or glue-free
interface to popular DSP and RISC processors. The
serial interface also supports Time Division Multiplex-
ing (TDM), allowing up to four CODECs to share a
single 4-wire serial bus.
V
IN+
AAF
V
IN–
V
REF
1
V
COM
V
REF
2
V
OUT+
SMF
V
OUT–
Reference
∆Σ
Modulator
(ADC)
Decimation
Digital Filter
HPF
FS
BCK
DIN
Loop
Serial I/O Interface
DOUT
Multi-Level
DAC
∆Σ
Modulator
Interpolation
Digital Filter
Clock
Gen/
OSC
FSO
SCKIO
Power
Mode Control
V
CC
AGND
DGND
V
DD
PDWN
LOOP
HPFD
M/S
TSC
XTO
XTI
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2,000 pieces
of “PCM3501E/2K” will get a single 2000-piece Tape and Reel.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no
responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice.
No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN
product for use in life support devices and/or systems.
®
3
PCM3501
PIN CONFIGURATION
Top View
SSOP
PCM3501
1
2
3
4
5
6
7
8
9
10
11
12
V
COM
V
REF
1
V
REF
2
V
IN+
V
IN–
M/S
TSC
BCK
FS
DIN
DOUT
FSO
V
CC
24
AGND 23
V
OUT+
22
V
OUT–
21
PDWN 20
LOOP 19
HPFD 18
XTI 17
XTO 16
SCKIO 15
DGND 14
V
DD
13
PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NAME
V
COM
V
REF
1
V
REF
2
V
IN+
V
IN–
M/S
TSC
BCK
FS
DIN
DOUT
FSO
V
DD
DGND
SCKIO
XTO
XTI
HPFD
LOOP
PDWN
V
OUT–
V
OUT+
AGND
V
CC
I/O
OUT
—
—
IN
IN
IN
IN
I/O
I/O
IN
OUT
OUT
—
—
I/O
OUT
IN
IN
IN
IN
OUT
OUT
—
—
DESCRIPTION
Common-Mode Voltage (0.5V
CC)
. This pin should be connected to ground through a capacitor.
Decouple Pin for Reference Voltage 1 (0.99V
CC
). This pin should be connected to ground through a capacitor.
Decouple Pin for Reference Voltage 2 (0.2V
CC
). This pin should be connected to ground through a capacitor.
Non-Inverting input to on-chip AFE.
Inverting input to on-chip AFE.
Master/Slave Select. This pin is used to determine the operating mode for the serial interface. A logic ‘0’ on this pin selects the Slave
Mode. A logic ‘1’ on this pin selects the Master Mode.
(2)
Time Slot Mode Control. This pin is used to select the time slot operating mode. A logic ‘0’ on this pin disables Time Slot Mode. A
logic ‘1’ on this pin enables Time Slot Mode.
(2)
Bit Clock. This pin serves as the bit (or shift) clock for the serial interface. This pin is an input in Slave Mode and an output in Master
Mode.
(1)
Frame Sync. This pin serves as the frame synchronization clock for the serial interface. This pin is an input in Slave Mode and an
output in Master Mode.
(1)
Serial Data Input. This pin is used to write 16-bit data to the DAC.
(1)
Serial Data Output. The ADC outputs 16-bit data on this pin.
(3)
Frame Sync Output. Active only when Time Slot Mode is enabled. This pin is set to a high impedance state when Time Slot mode
is disabled (TSC = 0).
Digital Power Supply. Used to power the digital section of the ADC and DAC, as well as the serial interface and mode control logic.
This pin is not internally connected to V
CC
.
Digital Ground. Internally connected through the substrate to analog ground.
System Clock Input/Output. This pin is a system clock output when using the crystal oscillator or XTI as the system clock input; when
XTI is connected to ground, this pin is a system clock input.
(1)
Crystal Oscillator Output.
Crystal Oscillator Input or an External System Clock Input.
High-Pass Filter Disable. When this pin is set to a logic ‘1’, the HPF function in the ADC is disabled.
(2)
ADC-to-DAC Loop-Back Control. When this pin is set to logic ‘1’, the ADC data is fed to the DAC input.
(2)
Power Down and Reset Control. When this pin is logic ‘0’, Power-Down Mode is enabled. The PCM3500 is reset on the rising edge
of this signal.
(2)
Inverting output.
Non-inverting output.
Analog Ground. This is the ground for the internal analog circuitry.
Analog Power Supply. Used to power the analog circuitry of the ADC and DAC.
NOTES: (1) Schmitt-Trigger input. (2) Schmitt-Trigger input with an internal pull-down resistor. (3) Tri-state output in Time Slot Mode.
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