®
PCM
171
8
®
PCM1718E
Stereo Audio
DIGITAL-TO-ANALOG CONVERTER
TM
FEATURES
q
ACCEPTS 16- or 18-BIT I
2
S, OR 18-BIT
NORMAL INPUT DATA
q
COMPLETE STEREO DAC:
8X Oversampling Digital Filter
Multi-Level Delta-Sigma DAC
Analog Low Pass Filter
Output Amplifier
q
HIGH PERFORMANCE:
–90dB THD+N
96dB Dynamic Range
100dB SNR
q
SYSTEM CLOCK: 256fs or 384fs
q
WIDE POWER SUPPLY: +2.7V to +5.5V
q
SELECTABLE FUNCTIONS:
Soft Mute
Digital De-emphasis
q
SMALL 20-PIN SSOP PACKAGE
DESCRIPTION
The PCM1718 is a complete low cost stereo, audio
digital-to-analog converter, including digital interpo-
lation filter, 3rd-order delta-sigma DAC, and analog
output amplifiers. PCM1718 is fabricated on a highly
advanced 0.6µ CMOS process. PCM1718 accepts 18-
bit normal input data format, or 16- or 18-bit I
2
S data
format.
The digital filter performs an 8X interpolation func-
tion, as well as special functions such as soft mute and
digital de-emphasis.
PCM1718 is suitable for a wide variety of cost-sensitive
consumer applications where good performance is re-
quired. Its low cost, small size, and single power supply
make it ideal for BS tuners, keyboards, MPEG audio,
PCMCIA audio cards (ZV port), MIDI applications,
and set-top boxes.
BCKIN
LRCIN
DIN
Serial
Input
I/F
8X Oversampling
Digital Filter with
Multi Function
Control
Multi-level
Delta-Sigma
Modulator
DAC
Output Amp
and
Low-pass
Filter
V
OUT
L
D/C_L
MUTE
DM0
DM1
FORMAT
Mode
Control
I/F
Multi-level
Delta-Sigma
Modulator
DAC
Output Amp
and
Low-pass
Filter
V
OUT
R
D/C_R
ZERO
Open Drain
RSTB
Reset
Clock/OSC Manager
Power Supply
XTI XTO
CLKO
V
CC
AGND
V
DD
DGND
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®
© 1996 Burr-Brown Corporation
PDS-1325A
1
Printed in U.S.A.
PCM1718E
June, 1996
SPECIFICATIONS
All specifications at +25°C, +V
CC
= +V
DD
= +5V, fs = 44.1kHz, and 18-bit input data, SYSCLK = 384fs, unless otherwise noted. Measurement bandwidth is 20kHz.
PCM1718E
PARAMETER
RESOLUTION
DIGITAL INPUT/OUTPUT
Logic Family
Input Logic Level:
V
IH(2)
V
IL(2)
V
IH(3)
V
IL(3)
V
IH(4)
V
IL(4)
Input Logic Current:
I
IH(5)
I
IL(5)
I
IH(6)
I
IL(6)
I
IH(4)
I
IL(4)
Output Logic Level: (+V
DD
= +5V)
V
OH(7)
V
OL(7)
V
OL(8)
Interface Format
Data Format
Sampling Frequency
System Clock Frequency
DC ACCURACY
Gain Error
Gain Mismatch Channel-to-Channel
Bipolar Zero Error
DYNAMIC
THD+N at FS (0dB)
THD+N at –60dB
Dynamic Range
Signal-To-Noise Ratio
Channel Separation
Level Linearity Error (–90dB)
PERFORMANCE
(1)
CONDITIONS
MIN
16
CMOS
70% of V
DD
30% of V
DD
70% of V
DD
30% of V
DD
64% of V
DD
28% of V
DD
–6.0
–120
–2
0.02
40
–40
3.8
1.0
1.0
Selectable Normal, I
2
S
16/18 Bits MSB First Binary Two’s Complement
32
44.1
48
8.192/12.288 11.2896/16.9344 12.288/18.432
±1.0
±1.0
±30
–90
–34
96
100
97
±0.5
–86
91
94
±0.17
–35
0.445
(fs = 32kHz ~ 48kHz)
0.555
–0.2
11.125/fs
FS (0dB) OUT
5
50% of V
CC
+V
CC
+V
DD
= +V
DD
= +V
DD
= +V
DD
= +V
DD
+2.7
+2.7
=
=
=
=
+5V
+3V
+5V
+3V
–25
–55
18.0
9.0
90
27
+5.5
+5.5
25.0
15.0
125
45
+85
+100
62% of V
CC
+0.55
±5.0
±5.0
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
V
V
V
TYP
MAX
18
UNITS
Bits
V
IN
= 3.2V
V
IN
= 1.4V
I
OH
= –5mA
I
OL
= +5mA
I
OL
= +5mA
256fs/384fs
kHz
MHz
% of FSR
% of FSR
mV
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
fs
fs
dB
sec
Vp-p
kΩ
V
VDC
VDC
mA
mA
mW
mW
°C
°C
V
O
= 1/2 V
CC
at Bipolar Zero
V
CC
= +5V, f = 991Hz
–80
EIAJ, A-weighted
EIAJ, A-weighted
90
92
90
DYNAMIC PERFORMANCE
(1)
THD+N at FS (0dB)
Dynamic Range
Signal-To-Noise Ratio
DIGITAL FILTER PERFORMANCE
Pass Band Ripple
Stop Band Attenuation
Pass Band
Stop Band
De-emphasis Error
Delay Time (Latency)
ANALOG OUTPUT
Voltage Range
Load Impedance
Center Voltage
POWER SUPPLY REQUIREMENTS
Voltage Range:
Supply Current: +I
CC
+I
DD(9)
Power Dissipation
TEMPERATURE RANGE
Operation
Storage
V
CC
= +3V, f = 991Hz
EIAJ, A-weighted
EIAJ, A-weighted
+V
CC
+V
CC
+V
CC
+V
CC
NOTES: (1) Tested with Shibasoku #725 THD. Meter 400Hz HPF, 30kHz LPF On, Average Mode with 20kHz bandwidth limiting. (2) Pins 4, 5, 6, 14: LRCIN, DIN,
BCKIN, FORMAT. (3) Pins 15, 16, 17, 18: RSTB, DM0, DM1, MUTE (Schmitt trigger input). (4) Pin 1: XTI. (5) Pins 15, 16, 17, 18: RSTB, DM0, DM1, MUTE (if
pull-up resistor is used). (6) Pins 4, 5, 6: LRCIN, DIN, BCKIN (if pull-up resistor is not used). (7) Pin 19: CLKO. (8) Pin 7: ZERO. (9) No load on pins 19 (CLKO)
and 20 (XTO).
®
PCM1718E
2
PIN CONFIGURATION
TOP VIEW
SSOP
PIN ASSIGNMENTS
PIN
NAME
FUNCTION
Data Input Interface Pins
XTI
DGND
V
DD
LRCIN
DIN
BCKIN
ZERO
D/C_R
V
OUT
R
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
XTO
CLKO
MUTE
DM1
DM0
RSTB
FORMAT
DC_L
V
OUT
L
V
CC
4
5
6
LRCIN
DIN
BCKIN
Sample Rate Clock Input. Controls the update rate (fs).
Serial Data Input. MSB first, right justified (Sony format,
18 bits) or I
2
S (Philips format, 16 or 18 bits).
Bit Clock Input. Clocks in the data present on DIN input.
Mode Control and Clock Signals
1
XTI
Oscillator Input (External Clock Input). For an internal
clock, tie XTI to one side of the crystal oscillator. For an
external clock, tie XTI to the output of the chosen
external clock.
A “HIGH” selects I
2
S input data format, and a “LOW”
selects Normal (Sony) input data format.
De-emphasis selection.
De-emphasis selection.
Soft Mute Control. When set “LOW”, the outputs are
muted.
Buffered Output of Oscillator. Equivalent to XTI.
Oscillator Output. When using the internal clock, tie to
the opposite side (from pin 1) of the crystal oscillator.
When using an external clock, leave XTO open.
14
(1)
FORMAT
16
(1)
17
(1)
18
(1)
19
20
DM0
DM1
MUTE
CLKO
XTO
AGND 10
Operational Controls and Flags
PACKAGE INFORMATION
PRODUCT
PCM1718E
PACKAGE
20-Pin SSOP
PACKAGE DRAWING
NUMBER
(1)
7
ZERO
Infinite Zero Detection Flag, open drain output. When
the input is continuously zero for 65,536 cycles of
BCKIN, ZERO is “LOW”.
Resets DAC operation with an active “LOW” pulse.
15
(1)
334-1
RSTB
Analog Output Functions
8
9
12
D/C_R
V
OUT
R
V
OUT
L
D/C_L
Right Channel Output Amplifier Common. Bypass to
ground with 10µF capacitor.
Right Channel Analog Output. V
OUT
max = 0.62 x V
CC
.
Left Channel Analog Output. V
OUT
max = 0.62 x V
CC
.
Left Channel Output Amplifier Common. Bypass to
ground with 10µF capacitor.
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage ....................................................................... +6.5V
+V
CC
to +V
DD
Difference ...................................................................
±0.1V
Input Logic Voltage .................................................. –0.3V to (V
DD
+ 0.3V)
Power Dissipation .......................................................................... 200mW
Operating Temperature Range ......................................... –25°C to +85°C
Storge Temperature ........................................................ –55°C to +125°C
Lead Temperature (soldering, 5s) .................................................. +260°C
Thermal Resistance,
θ
JA .......................................................................................
+70°C/W
13
Power Supply Connections
2
3
10
11
DGND
V
DD
AGND
V
CC
Digital Ground.
Digital Power Supply (+5V or +3V).
Analog Ground.
Analog Power Supply (+5V or +3V).
NOTE: (1) With internal pull-up.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
PCM1718E
TYPICAL PERFORMANCE CURVES
At T
A
= +25°C, V
S
= +5V, R
L
= 100Ω, C
L
= 2pF, and R
FB
= 402Ω, unless otherwise noted.
DYNAMIC PERFORMANCE
THD+N vs V
CC
, V
DD
f
IN
= 1kHz, 384fs
–84
–30
DYNAMIC RANGE vs INPUT DATA
f
IN
= 1kHz
100
THD+N at –60dB (dB)
–86
98
Dynamic Range (dB)
THD+N at FS (dB)
–60dB
–88
–34
256fs
96
384fs
94
–90
–92
0dB
–94
3.5
4.0
4.5
5.0
5.5
6.0
V
CC
, V
DD
(V)
–38
92
90
16-Bit
Input Data
18-Bit
THD+N vs TEMPERATURE
f
IN
= 1kHz, 384fs
–84
–30
–84
THD+N vs INPUT DATA
f
IN
= 1kHz, FS (0dB)
THD+N at –60dB (dB)
–86
–86
THD+N (dB)
THD+N at FS (dB)
–88
–60dB
–90
–34
–88
384fs
–90
–92
0dB
–90
–25
–38
–92
256fs
–94
0
25
50
75
85
100
16-Bit
Input Data
18-Bit
Temperature (°C)
DYNAMIC RANGE AND SNR vs V
CC
, V
DD
f
IN
= 1kHz, 384fs
100
SNR
98
96
(dB)
94
Dynamic
Range
92
90
3.5
4.0
4.5
V
CC
, V
DD
5.0
5.5
6.0
®
PCM1718E
4
TYPICAL PERFORMANCE CURVES
At T
A
= +25°C, V
S
= +5V, R
L
= 44.1kHz, f
SYS
= 384fs, and 18-bit input data, unless otherwise noted.
DIGITAL FILTER
OVERALL FREQUENCY CHARACTERISTIC
0
0
PASSBAND RIPPLE CHARACTERISTIC
–20
–0.2
–40
dB
dB
–0.4
–60
–0.6
–80
–0.8
–100
0 0.4536fs
1.3605fs
2.2675fs
3.1745fs
4.0815fs
Frequency (Hz)
–1
0
0.1134fs
0.2268fs
Frequency (Hz)
0.3402fs
0.4535fs
DE-EMPHASIS FREQUENCY RESPONSE (32kHz)
0
–2
–4
–6
–8
–10
–12
0
5k
10k
15k
Frequency (Hz)
20k
25k
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
0
Level (dB)
Error (dB)
DE-EMPHASIS ERROR (32kHz)
3628
7256
Frequency (Hz)
10884
14512
DE-EMPHASIS FREQUENCY RESPONSE (44.1kHz)
0
–2
–4
–6
–8
–10
–12
0
5k
10k
15k
20k
25k
Frequency (Hz)
DE-EMPHASIS FREQUENCY RESPONSE (48kHz)
0
–2
–4
–6
–8
–10
–12
0
5k
10k
15k
20k
25k
Frequency (Hz)
Level (dB)
Error (dB)
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
0
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
0
Level (dB)
Error (dB)
DE-EMPHASIS ERROR (44.1kHz)
4999.8375
9999.675
Frequency (Hz)
14999.5125
19999.35
DE-EMPHASIS ERROR (48kHz)
5442
10884
Frequency (Hz)
16326
21768
®
5
PCM1718E
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