Philips Semiconductors
Product specification
Universal LCD driver for low multiplex
rates
CONTENTS
1
2
3
4
5
6
6.1
6.2
6.3
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.5
6.5.1
6.5.2
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
Power-on reset
LCD bias generator
LCD voltage selector
LCD drive mode waveforms
Static drive mode
1 : 2 multiplex drive mode
1 : 3 multiplex drive mode
1 : 4 multiplex drive mode
Oscillator
Internal clock
External clock
Timing
Display latch
Shift register
Segment outputs
Backplane outputs
Display RAM
Data pointer
Subaddress counter
Output bank selector
Input bank selector
Blinker
CHARACTERISTICS OF THE I
2
C-BUS
Bit transfer (see Fig.12)
Start and stop conditions (see Fig.13)
System configuration (see Fig.14)
Acknowledge (see Fig.15)
PCF8576C I
2
C-bus controller
Input filters
I
2
C-bus protocol
Command decoder
Display controller
Cascaded operation
8
9
10
11
11.1
11.2
12
12.1
13
14
15
15.1
15.2
15.3
15.3.1
15.3.2
15.3.3
15.4
16
17
18
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
PCF8576C
Typical supply current characteristics
Typical characteristics of LC D outputs
APPLICATION INFORMATION
Chip-on-glass cascadability in single plane
BONDING PAD LOCATIONS
PACKAGE OUTLINES
SOLDERING
Introduction
Reflow soldering
Wave soldering
LQFP
VSO
Method (LQFP and VSO)
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
1998 Jul 30
2
Philips Semiconductors
Product specification
Universal LCD driver for low multiplex
rates
1
FEATURES
PCF8576C
•
Single-chip LCD controller/driver
•
Selectable backplane drive configuration: static or 2/3/4
backplane multiplexing
•
Selectable display bias configuration: static, 1/2 or 1/3
•
Internal LCD bias generation with voltage-follower
buffers
•
40 segment drives: up to twenty 8-segment numeric
characters; up to ten 15-segment alphanumeric
characters; or any graphics of up to 160 elements
•
40
×
4-bit RAM for display data storage
•
Auto-incremented display data loading across device
subaddress boundaries
•
Display memory bank switching in static and duplex
drive modes
•
Versatile blinking modes
•
LCD and logic supplies may be separated
•
Wide power supply range: from 2 V for low-threshold
LCDs and up to 6 V for guest-host LCDs and
high-threshold (automobile) twisted nematic LCDs.
A 9 V version is also available on request.
•
Low power consumption
•
Power-saving mode for extremely low power
consumption in battery-operated and telephone
applications
•
I
2
C-bus interface
•
TTL/CMOS compatible
•
Compatible with any 4-bit, 8-bit or 16-bit
microprocessors/microcontrollers
3
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
PCF8576CT
PCF8576CU
PCF8576CU/2
PCF8576CU/5
PCF8576CU/7
PCF8576CU/10
PCF8576CU/12
PCF8576CH
VSO56
−
−
−
−
FFC
FFC
LQFP64
chip in tray
chip with bumps in tray
unsawn wafer
chip with bumps on tape
chip-on-film frame carrier
chip with bumps on film frame carrier
plastic low profile quad flat package; 64 leads; body 10
×
10
×
1.4 mm
DESCRIPTION
plastic very small outline package; 56 leads
VERSION
SOT190-1
−
−
−
−
−
−
SOT314-2
•
May be cascaded for large LCD applications (up to
2560 segments possible)
•
Cascadable with 24-segment LCD driver PCF8566
•
Optimized pinning for plane wiring in both and multiple
PCF8576C applications
•
Space-saving 56-lead plastic very small outline package
(VSO56) or 64-lead low profile quad flat package
(LQFP64)
•
No external components
•
Compatible with chip-on-glass technology
•
Manufactured in silicon gate CMOS process.
2
GENERAL DESCRIPTION
The PCF8576C is a peripheral device which interfaces to
almost any Liquid Crystal Display (LCD) with low multiplex
rates. It generates the drive signals for any static or
multiplexed LCD containing up to four backplanes and up
to 40 segments and can easily be cascaded for larger LCD
applications. The PCF8576C is compatible with most
microprocessors/microcontrollers and communicates via a
two-line bidirectional I
2
C-bus. Communication overheads
are minimized by a display RAM with auto-incremented
addressing, by hardware subaddressing and by display
memory switching (static and duplex drive modes).
1998 Jul 30
3
Philips Semiconductors
Product specification
Universal LCD driver for low multiplex
rates
5
PINNING
PIN
SYMBOL
SOT190
SDA
SCL
SYNC
CLK
V
DD
OSC
A0 to A2
SA0
V
SS
V
LCD
BP0, BP2, BP1, BP3
S0 to S39
n.c.
1
2
3
4
5
6
7 to 9
10
11
12
13 to 16
17 to 56
−
SOT314
10
11
12
13
14
15
16 to 18
19
20
21
25 to 28
29 to 32, 34 to 47, 49 to 64, 2 to 7
1, 8, 9, 22 to 24, 33 and 48
PCF8576C
DESCRIPTION
I
2
C-bus serial data input/output
I
2
C-bus serial clock input
cascade synchronization input/output
external clock input
supply voltage
oscillator input
I
2
C-bus subaddress inputs
I
2
C-bus slave address input; bit 0
logic ground
LCD supply voltage
LCD backplane outputs
LCD segment outputs
not connected
1998 Jul 30
5
DSP and ARM Processors
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