Philips Semiconductors
Product specification
Clock/calendar with Power Fail Detector
CONTENTS
FEATURES
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
8
8.1
8.2
8.3
8.4
9
9.1
9.2
10
11
12
13
14
15
16
16.1
16.2
16.2.1
16.2.2
16.3
16.3.1
16.3.2
16.3.3
17
18
19
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
Oscillator
Prescaler and time counter
Alarm register
Comparator
Power on/power fail detection
Interface level shifters
CHARACTERISTICS OF THE I
2
C-BUS
Bit transfer
Start and stop conditions
System configuration
Acknowledge
I
2
C-BUS PROTOCOL
Addressing
Clock/calendar READ/WRITE cycles
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
APPLICATION INFORMATION
PACKAGE OUTLINES
SOLDERING
Introduction
DIP
Soldering by dipping or by wave
Repairing soldered joints
SO
Reflow soldering
Wave soldering
Repairing soldered joints
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
PCF8573
1997 Mar 28
2
Philips Semiconductors
Product specification
Clock/calendar with Power Fail Detector
1
FEATURES
2
GENERAL DESCRIPTION
PCF8573
•
Serial input/output I
2
C-bus interface for minutes, hours,
days and months
•
Additional pulse outputs for seconds and minutes
•
Alarm register for presetting a time for alarm or remote
switching functions
•
On-chip power fail detector
•
Separate ground pin for the clock allows easy
implementation of battery back-up during supply
interruption
•
Crystal oscillator control (32.768 kHz)
•
Low power consumption.
3
QUICK REFERENCE DATA
SYMBOL
V
DD
−
V
SS1
V
DD
−
V
SS2
f
osc
4
PARAMETER
supply voltage, clock (pin 16 to pin 15)
supply voltage, I
2
C-bus (pin 16 to pin 8)
crystal oscillator frequency
ORDERING INFORMATION
The PCF8573 is a low threshold, CMOS circuit that
functions as a real time clock/calendar. Addresses and
data are transferred serially via the two-line bidirectional
I
2
C-bus.
The IC incorporates an addressable time counter and an
addressable alarm register for minutes, hours, days and
months. Three special control/status flags, COMP, POWF
and NODA, are also available. Back-up for the clock during
supply interruptions is provided by a 1.2 V nickel cadmium
battery. The time base is generated from a 32.768 kHz
crystal-controlled oscillator.
MIN.
1.1
2.5
−
−
−
TYP.
MAX.
6.0
6.0
−
V
V
UNIT
32.768
kHz
PACKAGE
TYPE NUMBER
NAME
PCF8573P
PCF8573T
DIP16
SO16
DESCRIPTION
plastic dual in-line package; 16 leads (300 mil); long body
plastic small outline package; 16 leads; body width 7.5 mm
VERSION
SOT38-1
SOT162-1
1997 Mar 28
3
Philips Semiconductors
Product specification
Clock/calendar with Power Fail Detector
7
7.1
FUNCTIONAL DESCRIPTION
Oscillator
7.3
Alarm register
PCF8573
The PCF8573 has an integrated crystal-controlled
oscillator which provides the timebase for the prescaler.
The frequency is determined by a single 32.76 kHz crystal
connected between OSCI and OSCO. A trimmer is
connected between OSCI and V
DD
.
7.2
Prescaler and time counter
The alarm register is a 24-bit memory. It stores the
time-point for the next setting of the status flag COMP.
Details of writing and reading of the alarm register are
included in the description of the characteristics of the
I
2
C-bus.
7.4
Comparator
The prescaler provides a 128 Hz signal at the FSET output
for fine adjustment of the crystal oscillator without loading
it. The prescaler also generates a pulse once a second to
advance the seconds counter. The carry of the prescaler
and the seconds counter are available at the outputs SEC,
MIN respectively, and are also readable via the I
2
C-bus.
The mark-to-space ratio of both signals is 1 : 1. The time
counter is advanced one count by the falling edge of output
signal MIN. A transition from HIGH-to-LOW of output
signal SEC triggers MIN to change state. The time counter
counts minutes, hours, days and months, and provides a
full calendar function which needs to be corrected only
once every four years - to allow for leap-year. Cycle
lengths are shown in Table 1.
Table 1
Cycle length of the time counter
NUMBER OF BITS
7
6
6
The comparator compares the contents of the alarm
register and the time counter, each with a length of 24 bits.
When these contents are equal the flag COMP will be set
4 ms after the falling edge of MIN. This set condition
occurs once at the beginning of each minute. This
information is latched, but can be cleared by an instruction
via the I
2
C-bus. A clear instruction may be transmitted
immediately after the flag is set and will be executed. Flag
COMP information is also available at the output COMP.
The comparison may be based upon hours and minutes
only if the internal flag NODA (no date) is set. Flag NODA
can be set and cleared by separate instructions via the
I
2
C-bus, but it is undefined until the first set or clear
instruction has been received. Both COMP and NODA
flags are readable via the I
2
C-bus.
UNIT
minutes
hours
days
(1)
COUNTING CYCLE
00 to 59
00 to 23
01 to 28
01 to 30
01 to 31
CARRY FOR
FOLLOWING UNIT
59
→
00
23
→
00
28
→
01
or 29
→
01
30
→
01
31
→
01
12
→
01
CONTENT OF MONTH
COUNTER
2 (note 1)
2 (note 1)
4, 6, 9, 11
1, 3, 5, 7, 8, 10, 12
months
Note
5
01 to 12
1. During February of a leap-year the ‘Time Counter Days’ may be set to 29 by directly writing into it using the ‘execute
address’ function. Leap-years must be tracked by the system software.
1997 Mar 28
5
Analog electronics
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