Philips Semiconductors
Product specification
256
×
8-bit CMOS EEPROMs with
I
2
C-bus interface
CONTENTS
1
2
3
4
5
6
7
7.1
7.2
8
8.1
8.2
8.3
8.3.1
8.4
8.4.1
8.4.2
8.5
8.5.1
FEATURES
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
DEVICE SELECTION
BLOCK DIAGRAM
PINNING
Pin description PCF85102C-2
Pin description PCF85103C-2
I
2
C-BUS PROTOCOL
Bus conditions
Data transfer
Device addressing
Remark
Write operations
Byte/word write
Page write
Read operations
Remark
9
10
11
12
13
14
14.1
14.2
14.2.1
14.2.2
14.3
14.3.1
14.3.2
14.3.3
15
16
17
PCF85102C-2; PCF85103C-2
LIMITING VALUES
CHARACTERISTICS
I
2
C-BUS CHARACTERISTICS
WRITE CYCLE LIMITS
PACKAGE OUTLINES
SOLDERING
Introduction
Through-hole mount packages
Soldering by dipping or by solder wave
Manual soldering
Surface mount packages
Reflow soldering
Wave soldering
Manual soldering
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
2000 Feb 15
2
Philips Semiconductors
Product specification
256
×
8-bit CMOS EEPROMs with
I
2
C-bus interface
1
FEATURES
PCF85102C-2; PCF85103C-2
•
Low power CMOS:
– maximum operating current: 2.0 mA
– maximum standby current 10
µA
(at 6.0 V),
typical 4
µA.
•
Non-volatile storage of:
– 2 kbits organized as 256
×
8-bit.
•
Single supply with full operation down to 2.5 V
•
On-chip voltage multiplier
•
Serial input/output I
2
C-bus
•
Write operations:
– byte write mode
– 8-byte page write mode
(minimizes total write time per byte).
•
Read operations:
– sequential read
– random read.
•
Internal timer for writing (no external components)
•
Power-on reset
•
High reliability by using a redundant storage code
•
Endurance: 1000000 Erase/Write (E/W) cycles at
T
amb
= 22
°C
•
10 years non-volatile data retention time
•
Standard industrial pinning (pin 7 not connected)
•
Up to sixteen EEPROMs addressable in one I
2
C-bus
using both PCF85102 and PCF85103 in combination.
3
QUICK REFERENCE DATA
SYMBOL
V
DD
I
DDR
PARAMETER
supply voltage
supply current read
f
SCL
= 100 kHz
V
DD
= 2.5 V
V
DD
= 6.0 V
I
DDW
supply current E/W
f
SCL
= 100 kHz
V
DD
= 2.5 V
V
DD
= 6.0 V
I
DDstb
standby supply current
V
DD
= 2.5 V
V
DD
= 6.0 V
−
−
−
−
0.6
2.0
3.5
10
mA
mA
µA
µA
−
−
60
200
µA
µA
CONDITIONS
MIN.
2.5
MAX.
6.0
V
UNIT
2
GENERAL DESCRIPTION
The PCF85102C-2 and PCF85103C-2 (further referred to
as PCF8510xC-2) are 2 kbits (256
×
8-bit) floating gate
Electrically Erasable Programmable Read Only Memories
(EEPROMs). Power consumption is low due to the full
CMOS technology used. The programming voltage is
generated on-chip, using a voltage multiplier.
The PCF8510x-2 is pin compatible to widely used
industrial pinning (pin 7 not connected).
As data bytes are received and transmitted via the serial
I
2
C-bus, a package using eight pins is sufficient. Up to
sixteen PCF8510xC-2 devices may be connected to the
I
2
C-bus. This is possible with the introduction of a second
device selection code. Chip select is accomplished by
three address inputs (A0, A1 and A2) for each
PCF8510xC-2 type.
2000 Feb 15
3
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6
handbook, full pagewidth
2000 Feb 15
BLOCK DIAGRAM
I
2
C-BUS CONTROL LOGIC
BYTE
COUNTER
SEQUENCER
3
4
EE
CONTROL
Philips Semiconductors
VDD
8
SCL
6
SDA
5
INPUT
FILTER
n
256
×
8-bit CMOS EEPROMs with
I
2
C-bus interface
ADDRESS
HIGH
REGISTER
DIVIDER
( 128)
ADDRESS
SWITCH
8
EEPROM
SHIFT
REGISTER
BYTE
LATCH
(8 bytes)
ADDRESS
POINTER
5
PCF85102C-2;
PCF85103C-2
A2
A1
A0
3
2
1
TEST MODE DECODER
TIMER
( 16)
POWER-ON-RESET
OSCILLATOR
7
4
MGL967
n.c.
VSS
The pin numbers in this block diagram refer to the PCF85102C-2.
For PCF85103C-2, please see Chapter 7.
PCF85102C-2; PCF85103C-2
Product specification
Fig.1 Block diagram.
Test/Measurement
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