INTEGRATED CIRCUITS
DATA SHEET
PCF2105
LCD controller/driver
Product specification
Supersedes data of 1997 Dec 08
File under Integrated Circuits, IC12
1998 Jul 30
Philips Semiconductors
Product specification
LCD controller/driver
CONTENTS
1
2
3
3.1
3.2
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
8.13
8.14
8.15
8.16
9
9.1
9.2
9.3
9.3.1
9.3.2
FEATURES
APPLICATIONS
GENERAL DESCRIPTION
Packages
Available types
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
PAD FUNCTIONS
RS: Register Select (parallel control)
R/W: read/write (parallel control)
E: data bus clock (parallel control)
DB7 to DB0: data bus (parallel control)
C60 to C1: column driver outputs
R32 to R1: row driver outputs
V
LCD
: LCD power supply
OSC: oscillator
SCL: serial clock line
SDA: serial data line
SA0: address input
T1: test input
FUNCTIONAL DESCRIPTION
LCD bias voltage generator
Oscillator
External clock
Power-on reset
Registers
Busy flag
Address Counter (AC)
Display Data RAM (DDRAM)
Character Generator ROM (CGROM)
Character Generator RAM (CGRAM)
Cursor control circuit
Timing generator
LCD row and column drivers
Programming of the MUX rate 1 : 16
Programming of the MUX rate 1 : 32
Reset function
INSTRUCTIONS
Clear display
Return home
Entry mode set
I/D
S
9.4
9.4.1
9.4.2
9.4.3
9.5
9.6
9.6.1
9.6.2
9.7
9.8
9.9
9.10
9.11
10
11
11.1
11.2
11.3
11.4
11.5
11.6
12
13
14
15
16
17
17.1
17.2
17.3
17.4
17.5
18
19
20
21
PCF2105
Display control
D
C
B
Cursor/display shift
Function set
DL (parallel mode only)
N and M
Set CGRAM address
Set DDRAM address
Read busy flag and address
Write data to CGRAM or DDRAM
Read data from CGRAM or DDRAM
INTERFACE TO MICROCONTROLLER
(PARALLEL INTERFACE)
INTERFACE TO MICROCONTROLLER
(I
2
C-BUS INTERFACE)
Characteristics of the I
2
C-bus
Bit transfer
START and STOP conditions
System configuration
Acknowledge
I
2
C-bus protocol
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
TIMING DIAGRAMS
APPLICATION INFORMATION
4-bit operation, 2
×
12 display using internal
reset
8-bit operation, 2
×
12 display using internal
reset
8-bit operation, 2
×
24 display
I
2
C-bus operation, 2
×
12 display
Initializing by instruction
BONDING PAD LOCATIONS
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
1998 Jul 30
2
Philips Semiconductors
Product specification
LCD controller/driver
1
FEATURES
PCF2105
•
Single chip Liquid Crystal Display (LCD) controller/driver
•
1 or 2-line display of up to 24 characters per line, or
2 or 4-line display of up to 12 characters per line
•
5
×
7 character format plus cursor; 5
×
8 for kana
(Japanese syllabary) and user-defined symbols
•
On-chip generation of intermediate LCD bias voltages
•
On-chip oscillator requires no external components
(external clock also possible)
•
Display data RAM: 80 characters
•
Character generator ROM: 240 characters
•
Character generator RAM: 16 characters
•
4 or 8-bit parallel bus or 2-wire I
2
C-bus interface
(400 kHz)
•
CMOS and TTL compatible
•
32 row, 60 column outputs
•
Multiplex (MUX) rates 1 : 32 and 1 : 16
•
Uses common 11-code instruction set
•
Logic supply voltage range: V
DD
−
V
SS
= 2.5 to 6 V
•
Display supply voltage range: V
DD
−
V
LCD
= 3.5 to 9 V
•
Low power consumption
•
I
2
C-bus address selection (SA0): 011101.
2
APPLICATIONS
Furthermore, a fast I
2
C-bus interface (400 kHz) is
provided.
The PCF2105 is optimized for chip-on-glass applications.
A specific letter code ‘M’ for a character set is programmed
in the Character Generator ROM (CGROM) (see Fig.5).
The PCF2105 is a low power CMOS LCD controller/driver,
designed to drive a split screen dot matrix LCD of
1 or 2 lines by 24 characters or 2 or 4 lines by
12 characters with a 5
×
8 dot format. All necessary
functions for the display are provided in a single chip,
including on-chip generation of LCD bias voltages which
results in a minimum of external components and lower
system power consumption. To allow partial V
DD
shutdown
the ESD protection system of the SCL and SDA pads does
not use a diode connected to V
DD
.
The chip contains a character generator and displays
alphanumeric and kana characters. The PCF2105
interfaces to most microcontrollers via a 4 or 8-bit parallel
bus, or via the 2-wire I
2
C-bus.
3.1
Packages
•
Telecom equipment
•
Portable instruments
•
Point-of-sale terminals.
3
GENERAL DESCRIPTION
•
PCF2105MU/2: chip with bumps in tray.
3.2
Available types
•
PCF2105MU/2: character set ‘M’ in CGROM.
The PCF2105 integrated circuit is similar to the PCF2114x
(described in the
“PCF2116 family”
data sheet) but does
not contain the high voltage generator of that device.
4
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
PCF2105MU/2
−
chip with bumps in tray
DESCRIPTION
VERSION
−
1998 Jul 30
3
Philips Semiconductors
Product specification
LCD controller/driver
5
BLOCK DIAGRAM
PCF2105
handbook, full pagewidth
C60 to C1
21 to 80
60
111
BIAS
VOLTAGE
GENERATOR
COLUMN DRIVERS
6
60
R32 to R1
(1)
32
ROW DRIVERS
32
SHIFT REGISTER
32-BIT
V LCD
DATA LATCHES
60
SHIFT REGISTER
5 x 12-bit
5
CURSOR + DATA CONTROL
2
CHARACTER
GENERATOR
RAM
(CGRAM)
16
CHARACTERS
5
CHARACTER
GENERATOR
ROM
(CGROM)
240
CHARACTERS
PCF2105
VDD
V SS
4
OSCILLATOR
1
OSC
T1
101
8
DISPLAY DATA RAM
(DDRAM) 80 CHARACTERS
7
ADDRESS
COUNTER (AC)
7
INSTRUCTION
DECODER
8
DATA
REGISTER (DR)
8
7
BUSY
FLAG
8
INSTRUCTION
REGISTER (IR)
8
I/O BUFFER
8
102 to 109
DB7 to DB0
E
98
100
R/W
99
RS
97
SCL
7
TIMING
GENERATOR
DISPLAY
ADDRESS
COUNTER
POWER - ON
RESET
110
SDA
3
MGK846
SA0
(1) Pads 5 to 8 and 9 to 12 correspond with symbols R8 to R5 and R32 to R29.
Pads 13 to 20 and 81 to 88 correspond with symbols R24 to R17 and R9 to R16.
Pads 89 to 92 and 93 to 96 correspond with symbols R25 to R28 and R1 to R4.
Fig.1 Block diagram.
1998 Jul 30
4
Philips Semiconductors
Product specification
LCD controller/driver
6
PINNING
SYMBOL
OSC
V
DD
SA0
V
SS
R8 to R5
R32 to R29
R24 to R17
C60 to C1
R9 to R16
R25 to R28
R1 to R4
SCL
E
RS
R/W
T1
DB7 to DB0
SDA
V
LCD
7
7.1
PAD FUNCTIONS
RS: Register Select (parallel control)
PAD
1
2
3
4
5 to 8
9 to 12
13 to 20
21 to 80
81 to 88
89 to 92
93 to 96
97
98
99
100
101
102 to 109
110
111
I/O
I
−
I
−
O
O
O
O
O
O
O
I
I
I
I
I
I/O
I/O
I
logic supply voltage
I
2
C-bus address selection input
logic ground
LCD row driver outputs
LCD row driver outputs
LCD row driver outputs
LCD column driver outputs
LCD row driver outputs
LCD row driver outputs
LCD row driver outputs
I
2
C-bus serial clock input
data bus clock input
register select input
read/write input
test input
8-bit bidirectional data bus input/output
I
2
C-bus serial data input/output
LCD supply voltage input
7.4
DESCRIPTION
oscillator/external clock input
PCF2105
DB7 to DB0: data bus (parallel control)
Bit RS selects the register to be accessed for read and
write when the device is controlled by the parallel interface.
RS = 0 selects the instruction register for write and the
busy flag and address counter for read. RS = 1 selects the
data register for both read and write. There is an internal
pull-up resistor on pad RS.
7.2
R/W: read/write (parallel control)
The bidirectional, 3-state data bus transfers data between
the system controller and the PCF2105. DB7 acts as the
busy flag, signalling that internal operations are not yet
completed. In 4-bit operations, DB7 to DB4 are used and
DB3 to DB0 must be left open-circuit. There is an internal
pull-up resistor on each of the data lines. Note that
pads DB7 to DB0 must be left open-circuit when I
2
C-bus
control is used.
7.5
C60 to C1: column driver outputs
R/W selects either the read (R/W = 1) or write (R/W = 0)
operation when control is by the parallel interface. There is
an internal pull-up resistor on pad R/W.
7.3
E: data bus clock (parallel control)
Pads C60 to C1 output the data for pairs of columns.
This arrangement permits optimized Chip-On-Glass
(COG) layout for 4-line by 12 characters.
7.6
R32 to R1: row driver outputs
Pad E should be HIGH to signal the start of a read or write
operation when the device is controlled by the parallel
interface. Data is clocked in or out of the chip on the falling
edge of the clock. Note that pad E must be connected to
V
SS
(logic 0) when I
2
C-bus control is used.
Pads R32 to R1 output the row select waveforms to the
left and right halves of the display.
7.7
V
LCD
: LCD power supply
Negative power supply for the liquid crystal display.
1998 Jul 30
5
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