SLRC3104001DCADS datasheet, PDF

Datasheet> All Categories > Passive components> The resistor> SLRC3104001DCADS

SLRC3104001DCADS: DescriptionArray/Network Resistor, Isolated, Thin Film, 0.1W, 104000ohm, 0.5% +/-Tol, -10,10ppm/Cel, 1510,; CategoryPassive components The resistor; File Size233KB，3 Pages; ManufacturerVishay; Websitehttp://www.vishay.com

Download Datasheet Parametric View All

SLRC3104001DCADS Overview

Array/Network Resistor, Isolated, Thin Film, 0.1W, 104000ohm, 0.5% +/-Tol, -10,10ppm/Cel, 1510,

SLRC3104001DCADS Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	721577734
Reach Compliance Code	unknown
Country Of Origin	USA
ECCN code	EAR99
YTEOL	7
structure	Single Layer
JESD-609 code	e0
Network Type	Isolated
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package height	0.38 mm
Package length	3.84 mm
Package form	SMT
Package width	2.54 mm
Rated power dissipation(P)	0.1 W
resistance	104000 Ω
Resistor type	ARRAY/NETWORK RESISTOR
series	SLR
size code	1510
technology	THIN FILM
Temperature Coefficient	10 ppm/°C
Terminal surface	Tin/Lead (Sn/Pb)
Tolerance	0.5%

SLRC3104001DCADS Preview

SLR

Vishay Electro-Films

Single Layer Resistor Carrier Networks

FEATURES

•

Standard sizes 0.100, 0.150, 0.210 wide

•

Custom sizes up to 0.500 inches x 0.500 inches

•

Pad count to 36

Product may not

be to scale

•

Mixed values to 500 kΩ

•

Multiple reference resistor groups

•

Ratio tolerance to ± 0.01 %

•

Ratio TCR’s to ± 1 ppm/°C

•

Nichrome resistor material standard. Tantalum nitride

available, consult factory

•

Custom pad spacing 0.025 inches or greater

SLR (Single Layer Resistor Carrier) networks are offered to provide the user with a leadless device that maximizes board density

while maintaining tight ratio tolerances and TCR tracking. Pads are provided top and bottom connected by edge castellations for

ease of visual solder joint inspection. Resistors can be covered with Vishay Electro-Films (EFI) proprietary thermal set plastic

for physical protection or left uncoated to facilitate user trimming.

SLR’s are provided with 0.050 inches standard contact spacing; however, 0.025 inches contact spacing is also available. The

standard contact metallization is gold flash over nickel plate. Solder coated contacts can be provided if preferred. Custom

configurations, values, and tolerance combinations are available with fast turnaround.

PRODUCT CAPABILITIES

Resistance Range

Absolute Resistance Tolerance

Resistance Ratio Tolerance

Absolute TCR

Ratio TCR

Absolute Resistor Stability (Mean)*

Ratio Resistor Stability (Mean)*

Package Power Dissipation

Temperature Range

to 500 kΩ

± 1 % to ± 0.05 %

± 0.1 % to ± 0.01 %

± 50 ppm/°C; available to ± 10 ppm/°C

± 5 ppm/°C; available to ± 1 ppm/°C

300 ppm/1000 hours at 125 °C (typical)

18 ppm/1000 hours at 125 °C (typical)

100 mW/Res at 70 °C, 50 mW/125 °C

0 °C to + 70 °C, - 40 °C to + 85 °C, - 55 °C to + 125 °C

The SLR construction allows for a wide selection of special sizes and shapes with rapid turnaround and low NRE costs. The holes

for the edge castellations are laser drilled into a multiple-up, large area substrates in-house prior to metallization. This permits

new configurations with only laser software and a mask set.

Custom parts can be provided with combinations of features listed:

Any combination of resistor values between 100

and 100 kΩ in the standard sizes.

Custom resistor network patterns (no crossovers).

A wide variety of rectangular sizes and shapes with contact pads on two to four sides.

Pad center-to-center spacings from 0.025 inches (0.635 mm) and larger.

Uncoated to permit customer trimming.

PACKAGED

PRODUCTS

NETWORKS

Document Number: 61068

Revision: 09-Mar-07

For technical questions, contact: efi@vishay.com

www.vishay.com

131

SLR

Vishay Electro-Films

OUTLINE DRAWING

DIMENSIONS

in inches [millimeters]

Single Layer Resistor Carrier Networks

Centers

0.025

[0.64]

0.050

[1.28]

0.100

[2.54]

0.100

[2.54]

0.150

[3.84]

0.210

[5.37]

0.015

[0.38]

0.030

[0.76]

0.030

[0.76]

0.030

[0.76]

0.025

[0.64]

0.050

[1.28]

0.050

[1.28]

0.050

[1.28]

0.015

[0.38]

0.015

[0.38]

0.025

[0.64]

0.025

[0.64]

0.020

[0.51]

0.020

[0.51]

0.020

[0.51]

0.020

[0.51]

0.050

[1.28]

0.050

[1.28]

PIN 1

* 0.025 inches [0.64 mm] per resistor, 2 to 18 pads.

** 0.050 inches [1.28 mm] per resistor, 2 to 18 pads.

Resistor

Area

Single Layer 16 Pin Chip Carrier

Chip measures 0.300 inches x 0.300 inches.

Castellations are on 0.050 inches (1.27 mm) centers.

(Special Order)

Standard Pitch: Castellations are

on 0.050 inches (1.27 mm) centers

(0.025 inch pitch special order)

ORDERING INFORMATION

Example: SLRC-4-10000-1-B-F-D-C-G, 8 Lead 0.100 wide, with 4 Identical 100 kΩ Isolated Resistors, Absolute Tolerance: 0.1 %, Ratio

Tolerance: 0.1 %, Absolute TCR: 50 ppm/°C, Ratio TCR: 2 ppm/°C, Gold Termination

SLR

MODEL

WIDTH

10 000

NUMBER

RESISTANCE

VALUE

ABSOLUTE

VALUE

MULTIPLIER TOLERANCE

RESISTORS

ALL SAME

VALUE

(5 Significant

Digits)

= 0.001

= 0.01

= 0.1

= 1.0

= 10.0

= 100.0

= 0.05

= 0.1

= 0.2

= 0.5

= 1.0

= 2.0

= 5.0

= 10.0

= 20.0

RATIO

TOLERANCE

ABSOLUTE TCR. RATIO TCR TERMINATION

PPM/°C

= 100

= 150

= 210

PACKAGED

PRODUCTS

NETWORKS

(To R1)

= 0.005

= 0.010

= 0.025

= 0.050

= 0.100

= 0.250

= 0.500

= 1.000

= N/A

= 10

= 25

= 50

= 100

= 10

= N/A

= Ni/Gold

= Solder

Coated

NOTE:

Factory will covert order number into final part number.

For special value combinations and pin outs consult Application Engineer

www.vishay.com

132

For technical questions, contact: efi@vishay.com

Document Number: 61068

Revision: 09-Mar-07

Legal Disclaimer Notice

Vishay

Disclaimer

All product specifications and data are subject to change without notice.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf

(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein

or in any other disclosure relating to any product.

Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any

information provided herein to the maximum extent permitted by law. The product specifications do not expand or

otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed

therein, which apply to these products.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this

document or by any conduct of Vishay.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless

otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such

applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting

from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding

products designed for such applications.

Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000

Revision: 18-Jul-08

www.vishay.com

More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

Recommended Resources

Audio DA converter and amplifier circuit

Forward and reverse control circuit of micro DC motor b

TTL oscillator interface data for television display

Ordinary thyristor single-phase control circuit

MC33269 programmable output regulated power supply

Yaoke joins hands with 99click to strengthen marketing effectiveness evaluation: Recently, Babaike signed a contract with 99click, a well-known domestic network marketing effect analysis service provider, aiming to use its professional network monitoring and Internet marketing dat...; 开善寺 Talking

How to generate a binary file in DEBUG mode?: I have the source code of EBOOT. How can I generate a binary file in DEBUG mode?...; qzl1125186 Embedded System

【Design Tools】Xilinx Configuration Guide: Different methods of configuring Xilinx FPGAs and programming CPLDs and PROMs help meet the different needs of system designers. This document describes the different configuration modes to help desig...; GONGHCU FPGA/CPLD

I want to learn embedded system, can you give me some advice?: I graduated from university last year, worked at ASUS Computer for a year, and now I work in a large company doing software testing. My major is measurement and control technology and instrumentation....; dq043 Embedded System

Blind hole setting in PADS: ...; 静若幽兰 PCB Design

Usage of #ifndef #define #endif: The macros you have encountered are for conditional compilation. In general, all lines in the source program are compiled. But sometimes you want to compile a part of the content only when certain con...; 牛默默 MCU

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components