EEWORLDEEWORLDEEWORLD

Part Number

Search

8N4Q001FG-0165CDI8

Description
IC osc clock QD freq 10clcc
Categorysemiconductor    Analog mixed-signal IC   
File Size163KB,20 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet View All

8N4Q001FG-0165CDI8 Online Shopping

Suppliers Part Number Price MOQ In stock  
8N4Q001FG-0165CDI8 - - View Buy Now

8N4Q001FG-0165CDI8 Overview

IC osc clock QD freq 10clcc

Quad-Frequency Programmable XO IDT8N4Q001 REV G
DATA SHEET
General Description
The IDT8N4Q001 is a Quad-Frequency Programmable Clock
Oscillator with very flexible frequency programming capabilities. The
device uses IDT’s fourth generation FemtoClock® NG technology for
an optimum high clock frequency and low phase noise performance.
The device accepts 2.5V or 3.3V supply and is packaged in a small,
lead-free (RoHS 6) 10-lead ceramic 5mm x 7mm x 1.55mm package.
Besides the four default power-up frequencies set by the FSEL0 and
FSEL1 pins, the IDT8N4Q001 can be programmed via the I
2
C
interface to output clock frequencies between 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz to a very high degree of
precision with a frequency step size of 435.9Hz ÷
N
(N is the PLL
output divider). Since the FSEL0 and FSEL1 pins are mapped to four
independent PLL divider registers (P, MINT, MFRAC and N),
reprogramming those registers to other frequencies under control of
FSEL0 and FSEL1 is supported. The extended temperature range
supports wireless infrastructure, telecommunication and networking
end equipment requirements.
Features
Fourth generation FemtoClock® NG technology
Programmable clock output frequency from 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz
Four power-up default frequencies (see part number order
codes), re-programmable by I
2
C
I
2
C programming interface for the output clock frequency and
internal PLL control registers
Frequency programming resolution is 435.9Hz ÷N
One 2.5V, 3.3V LVDS clock output
Two control inputs for the power-up default frequency
LVCMOS/LVTTL compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz): 0.253ps
(typical), integer PLL feedback configuration
RMS phase jitter @ 156.25MHz (1kHz - 40MHz): 0.263ps
(typical), integer PLL feedback configuration
Full 2.5V or 3.3V supply modes
-40°C to 85°C ambient operating temperature
Available in Lead-free (RoHS 6) package
Block Diagram
OSC
f
XTAL
÷MINT,
MFRAC
2
25
FSEL1
FSEL0
SCLK
SDATA
OE
Pulldown
Pulldown
Pullup
Pullup
Pullup
Pin Assignment
÷P
PFD
&
LPF
FemtoClock® NG
VCO
1950-2600MHz
÷N
Q
nQ
DNU 1
OE 2
GND 3
FSEL0 4
FSEL1 5
10 SCLK
9 SDATA
8 V
DD
7 nQ
6 Q
7
Configuration Register (ROM)
(Frequency, APR, Polarity)
I
2
C Control
IDT8N4Q001
10-lead ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
IDT8N4Q001GCD
REVISION A
MARCH 6, 2012
1
©2012 Integrated Device Technology, Inc.
Download to learn about ADI's vision-based occupancy detection solution and win a 50-yuan JD card
[font=微软雅黑][size=4]Activity time: From now on to May 21, 2015[/size][/font] [font=微软雅黑][size=4]Activity page: [url=https://www.eeworld.com.cn/huodong/ADI-12/]https://www.eeworld.com.cn/huodong/ADI-12/...
EEWORLD社区 ADI Reference Circuit
Design of high linearity low voltage low noise amplifier
ACMOSradiofrequencylownoiseamplifierwithhighlinearityandlowoperationvoltageoflessthan1.0Vispresented.Inthiscircuit,anauxiliaryMOSFETinthetrioderegionisusedtoboostthelinearity.Simulationshowsthatthisme...
JasonYoo Analog electronics
Understand LoRa in one article, turn to in-depth article
This article first introduces the forces behind LoRaWAN and the network deployment from a horizontal perspective, and then explains the network architecture and specific protocol content vertically to...
john_wang RF/Wirelessly
[National Technology Low Power Series N32L43x Review] 07. Automatically calculate configuration parameters through CAN communication baud rate
[i=s]This post was last edited by xld0932 on 2022-7-19 20:35[/i]The National N32L43X series MCU has a CAN interface, which supports CAN protocol 2.0A and 2.0B. It can efficiently process a large numbe...
xld0932 Domestic Chip Exchange
Why can't I mount the sdcard fat partition after I change the SD card to inand and boot the S5pv210?
,mode=755,gid=1000 0 tmpfs /mnt/obb tmpfs rw,relatime,mode=755,gid=1000 0 tmpfs /mnt/obb tmpfs rw,relatime,mode=755,gid=1000 0 tmpfs /mnt/opt/opt tmpfs rw,relatime,mode=755,gid=1000 0 tmpfs /mnt/opt/o...
gooogleman Embedded System
There is a surprise: If you encounter a Labview problem and no one is helping you, try this
A drag-and-drop operation can complete the host computer interface in minutes. This is probably the impression many people have of LabVIEW, a graphical programming software. It is easy to use, but som...
EEWORLD社区 Test/Measurement

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2779  1315  1443  2668  230  56  27  30  54  5 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号