TTS92256V-35B4 datasheet, PDF - EEWORLD Datasheet

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TTS92256V-35B4: DescriptionSRAM; Categorystorage storage; File Size78KB，11 Pages; ManufacturerAPTA Group Inc

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SRAM

TTS92256V-35B4 Parametric

Parameter Name	Attribute value
Objectid	1154969859
package instruction	,
Reach Compliance Code	unknown
ECCN code	EAR99

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TRAILING EDGE PRODUCT - MINIMUM ORDER APPLIES

MSM832 - 020/025/35

PRODUCT MAY BE MADE OBSOLETE WITHOUT NOTICE

: November 1998

ISSUE 4.3

32K x 8 SRAM

MSM832 - 020/025/35

Elm Road, West Chirton, NORTH SHIELDS, Tyne & Wear

NE29 8SE, England Tel. +44 (0)191 2930500 Fax. +44 (0) 191 2590997

Issue 5.0 : April 2001

Description

The MSM832 is a high speed Static RAM organ-

ised as 32K x 8 available with access times of 20

25 or 35 ns. It features completely static opera-

tion with a low power standby mode and is 3.0V

battery back-up compatible. It is directly TTL

compatible and has common data inputs and

outputs.

The device may be screened in accordance with

MIL-STD-883.

32,768 x 8 CMOS High Speed Static RAM

Features

• Fast Access Times of 20/25/35 ns.

• JEDEC Standard footprint.

• Operating Power

1 W (max)

• Low Power Standby 13 mW (max) -L version.

• Low Voltage Data Retention.

• Directly TTL compatible.

• Completely Static Operation.

Block Diagram

Pin Definitions

A 1

A 2

A 3

A 4

A 5

A 6

A 7

A 8

A 9

A 10

D 11

D 12

D 13

G D 14

A12

A13

A14

Address

Buffer

Row

Decoder

Memory Array

512 X 512

V,T

PACKAGE

TOP VIEW

I/O

Buffer

Column I/O

Column Decoder

Y Address Buffer

A13

A11

A10

A11

Package Details

Pin Count

Description

Package Type

0.1" Vertical-in-LIne (VIL

)

0.3" Dual-in-line (SKINNY DIP)

0.6" Dual-in-line

Pin Functions

A0-A14

Address inputs

D0-7

Data Input/Output

Chip Select

Output Enable

Write Enable

Power(+5V)

GND

Ground

ISSUE 4.3 : November 1998

MSM832 - 020/025/35

DC OPERATING CONDITIONS

Absolute Maximum Ratings

(1)

Voltage on any pin relative to V

SS (2)

Power Dissipation

Storage Temperature

STG

-0.5V to +7

-65 to +150

Notes : (1) Stresses above those listed may cause permanent damage. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the operational sections

of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods

may affect device reliability.

Recommended Operating Conditions

Parameter

Supply Voltage

Input High Voltage

Input Low Voltage

Operating Temperature

Symbol

min

4.5

2.2

-0.5

-40

-55

typ

5.0

max

5.5

+0.5

0.8

125

Unit

C ( Suffix

)

C ( Suffix

M, MB

)

DC Electrical Characteristics

= 5.0V±10%, T

=-55°C to +125°C)

Parameter

Input Leakage Current

Output Leakage Current

Average Supply Current

Standby Supply Current

Symbol Test Condition

SB1

SB2

=0V to V

CS=V

or OE=V

I/O

= V

to V

,WE=V

CS=V

I/O

=0mA, Min. Cycle, Duty=100%

CS=V

,Min Cycle.

CS≥V

-0.2V, 0.2V≥V

≥V

-0.2V

= 8.0 mA

= -4.0 mA

min

-2

2.4

typ

max

182

2.3

0.4

Unit

µA

-L Version

Output Voltage

Capacitance

=5V±10%,T

=25°C)

Parameter

Input Capacitance

I/O Capacitance

Note:

Symbol Test Condition

I/O

= 0V

I/O

= 0V

min

typ

max

Unit

This parameter is not 100% tested.

MSM832 - 020/025/35

ISSUE 4.3 : November 1998

Operating Modes

The table below shows the logic inputs required to control the MSM832 SRAM.

Mode

Not Selected

OutputDisable

Read

Write

1 = V

Current

SB1

SB2

0 = V

I/O Pin Reference Cycle

High Z

OUT

Read Cycle

Write Cycle

Power Down

X = Don't Care

Low V

Data Retention Characteristics - L Version Only

( T

=-55°C to +125°C)

Parameter

for Data Retention

Data Retention Current -L Version

Chip Deselect to Data Retention Time

Operation Recovery Time

Notes (1) t

= Read Cycle Time

Symbol

CCDR2

CDR

Test Condition

CS≥V

-0.2V, V

≥0V

See Retention Waveform

min

2.0

RC(1)

typ

max

5.5

350

Unit

µA

=2.0V, CS≥V

-0.2V, V

≥0V

AC Test Conditions

* Input pulse levels: 0V to 3.0V

* Input rise and fall times: 3ns

* Input and Output timing reference levels: 1.5V

* Output load: see diagram

* V

=5V±10%

Output Load

I/O Pin

166

Ω

1.76V

30pF

ISSUE 4.3 : November 1998

MSM832 - 020/025/35

AC OPERATING CONDITIONS

Read Cycle

Parameter

Read Cycle Time

Address Access Time

Chip Select Access Time

Output Enable to Output Valid

Output Hold from Address Change

Chip Selection to Output in Low Z

Output Enable to Output in Low Z

Chip Deselection to Output in High Z

(3)

Output Disable to Output in High Z

(3)

max

Symbol min

ACS

CLZ

OLZ

CHZ

OHZ

min

max

Unit

Write Cycle

Parameter

Write Cycle Time

Chip Selection to End of Write

Address Valid to End of Write

Address Setup Time

Write Pulse Width

Write Recovery Time

Write to Output in High Z

Data to Write Time Overlap

Data Hold from Write Time

Output Active from End of Write

Symbol min. max

WHZ

min. max

min

max

Unit

MSM832 - 020/025/35

ISSUE 4.3 : November 1998

Read Cycle 1 Timing Waveform

(1)

Address

OLZ

CLZ

ACS

CHZ(3)

OHZ(3)

Dout

High-Z

Data Valid

Read Cycle 2 Timing Waveform

(1) (2) (4)

Address

Dout

Data Valid

Notes: (1) WE is High for Read Cycle.

(2) Device is continuously selected, CS=V

(3) t

CHZ

and t

OHZ

are defined as the time at which the outputs achieve the open circuit conditions and are not referenced

to output voltage levels. These parameters are sampled and not 100% tested.

(4) OE=V

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