EH2500TS-83.330M datasheet, PDF

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EH2500TS-83.330M: DescriptionCMOS, Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD); CategoryPassive components oscillator; File Size935KB，10 Pages; ManufacturerECLIPTEK; Websitehttp://www.ecliptek.com; Environmental Compliance

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EH2500TS-83.330M Overview

CMOS, Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)

EH2500TS-83.330M Parametric

Parameter Name	Attribute value
Brand Name	Ecliptek
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	7039747456
Parts packaging code	SMD 5.0mm x 7.0mm
Contacts	4
Manufacturer packaging code	SMD 5.0mm x 7.0mm
Reach Compliance Code	compliant
JESD-609 code	e4
Manufacturer's serial number	EH25
Oscillator type	CMOS
Terminal surface	Nickel/Gold (Ni/Au)

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Ecliptek | EH25 Series Oscillator

http://www.ecliptek.com/oscillators/EH25/

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EH25 Series Oscillator

Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)

2011/65 +

2015/863

168 SVHC

Revision G 06/08/2012

Electrical Specifications

Nominal Frequency

1.000MHz to 155.520MHz

Some frequencies within this range may not be available.

Frequency Tolerance/Stability

(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency

Stability over the Operating Temperature Range, Supply Voltage

Change, Output Load Change, First Year Aging at 25°C, Shock, and

Vibration)

±100ppm Maximum

±50ppm Maximum

±25ppm Maximum

±20ppm Maximum

±5ppm/year Maximum

0°C to +70°C

-40°C to +85°C

5.0V

±10%

No Load

50mA Maximum

= -16mA

2.4V

Minimum with TTL Load, V

-0.4V

Minimum with HCMOS

Load

= +16mA

0.4V

Maximum with TTL Load, 0.5V

Maximum with HCMOS Load

50 ±10(%) Measured at 1.4V

with TTL Load or at 50% of waveform

with HCMOS Load from 1MHz to 70MHz Measured at 50% of waveform

above 70MHz

50 ±5(%) Measured at 50% of waveform

Measured at 0.8V

to 2.0V

with TTL Load; Masured at 20% to 80%

of waveform with HCMOS Load

6nSec Maximum from 1MHz to 70MHz

4nSec Maximum from 70.000001MHz to 155.520MHz

10 TTL Load or 50pF HCMOS Load Maximum from 1MHz to 70MHz

5 TTL Load or 15pF HCMOS Load Maximum from 70.000001MHz to

155.520MHz

CMOS

Tri-State (High Impedance)

+2.2V

Minimum to Enable Output, +0.8V

Maximum to Disable

Output (High Impedance), No Connect to Enable Output

±250pSec Maximum, ±100pSec Typical

±50pSec Maximum, ±30pSec Typical

Aging at 25°C

Operating Temperature Range

Supply Voltage

Input Current

Output Voltage Logic High (V

)

Output Voltage Logic Low (V

)

Duty Cycle

Rise Time/Fall Time

Load Drive Capability

Output Logic Type

Pin 1 Connection

Tri-State Input Voltage (Vih and Vil)

Absolute Clock Jitter

One Sigma Clock Period Jitter

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28-Jan-2016 1:03 PM

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