EEWORLDEEWORLDEEWORLD

Part Number

Search

PALCE16V8Z-15PI

Description
EE PLD, 25 ns, PDSO20
CategoryProgrammable logic devices    Programmable logic   
File Size322KB,32 Pages
ManufacturerLattice
Websitehttp://www.latticesemi.com
Download Datasheet Parametric View All

PALCE16V8Z-15PI Overview

EE PLD, 25 ns, PDSO20

PALCE16V8Z-15PI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerLattice
Parts packaging codeDIP
package instructionPLASTIC, DIP-20
Contacts20
Reach Compliance Code_compli
ECCN codeEAR99
ArchitecturePAL-TYPE
maximum clock frequency50 MHz
JESD-30 codeR-PDIP-T20
JESD-609 codee0
length26.1366 mm
Dedicated input times8
Number of I/O lines8
Number of entries18
Output times8
Number of product terms64
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize8 DEDICATED INPUTS, 8 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP20,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5 V
Programmable logic typeEE PLD
propagation delay15 ns
Certification statusNot Qualified
Maximum seat height4.953 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
PALCE16V8
PALCE16V8Z
COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10
COM’L:-25
IND:-12/1
PALCE16V8 and PALCE16V8Z Fa
EE CMOS (Zero-Power) 20-Pin Universal
Programmable Array Logic
DISTINCTIVE CHARACTERISTICS
x
Pin and function compatible with all 20-pin PAL
®
devices
x
Electrically erasable CMOS technology provides reconfigurable logic and full testabili
x
High-speed CMOS technology
GENERAL DESCRIPTION
The PALCE16V8 is an advanced PAL device built with low-power, high-speed, electric
erasable CMOS technology. It is functionally compatible with all 20-pin GAL devices.
macrocells provide a universal device architecture. The PALCE16V8 will directly repla
PAL16R8, with the exception of the PAL16C1.
The PALCE16V8Z provides zero standby power and high speed. At 30-µA maximum s
current, the PALCE16V8Z allows battery-powered operation for an extended period.
The PALCE16V8 utilizes the familiar sum-of-products (AND/OR) architecture that allow
implement complex logic functions easily and efficiently. Multiple levels of combinato
can always be reduced to sum-of-products form, taking advantage of the very wide in
available in PAL devices. The equations are programmed into the device through floa
cells in the AND logic array that can be erased electrically.
The fixed OR array allows up to eight data product terms per output for logic functio
sum of these products feeds the output macrocell. Each macrocell can be programme
registered or combinatorial with an active-high or active-low output. The output confi
is determined by two global bits and one local bit controlling four multiplexers in eac
macrocell.
Publication#
16493
Amendment/0
Rev: F
Issue Date:
September 2000
U
SE
G
N AL
EW D
EV
D
ES IC
IG ES
N F
S O
R
x
x
x
x
x
x
x
x
x
x
x
— 5-ns propagation delay for “-5” version
— 7.5-ns propagation delay for “-7” version
Direct plug-in replacement for the PAL16R8 series
Outputs programmable as registered or combinatorial in any combination
Peripheral Component Interconnect (PCI) compliant
Programmable output polarity
Programmable enable/disable control
Preloadable output registers for testability
Automatic register reset on power up
Cost-effective 20-pin plastic DIP, PLCC, and SOIC packages
Extensive third-party software and programmer support
Fully tested for 100% programming and functional yields and high reliability
5-ns version utilizes a split leadframe for improved performance
How to effectively improve the performance of mixed-analog design through simulation.pdf
This is information for unskilled electronic engineers, I hope you like it!...
df300mhz FPGA/CPLD
Please! A BJT version of UA741
A BJT UA741 layout. I can't find any relevant information online!I hope experts can help me....
bily508 Analog electronics
MicroPython has made several adjustments to USB functions
SCSI can support multiple logical units through one interfacehttps://github.com/micropython/micropython/commit/518aa571ab064ba8feb0b503f91fba0a62ad22b0 Provide custom query handling via MSC interfaceh...
dcexpert MicroPython Open Source section
What is this forum talking about?
What is this forum talking about?...
zhangkui MCU
Secondary dialing problem AT%%DTMF
As the title says. Based on Wince6.0 RILMDD, I develop the secondary dialing function. The command of the modem is DTMF. After I configure it according to the parameters, I can receive the response of...
hhhhh88 Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1749  461  1206  2168  1922  36  10  25  44  39 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号