74F379 Quad Parallel Register with Enable
May 1988
Revised October 2000
74F379
Quad Parallel Register with Enable
General Description
The 74F379 is a 4-bit register with buffered common
Enable. This device is similar to the 74F175 but features
the common Enable rather than common Master Reset.
Features
s
Edge triggered D-type inputs
s
Buffered positive edge-triggered clock
s
Buffered common enable input
s
True and complement outputs
Ordering Code:
Order Number
74F379SC
74F379SJ
74F379PC
Package Number
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009527
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74F379
Unit Loading/Fan Out
U.L.
Pin Names
E
D
0
–D
3
CP
Q
0
–Q
3
Q
0
–Q
3
Description
HIGH/LOW
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Flip-Flop Outputs
Complement Outputs
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
50/33.3
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
−
1 mA/20 mA
−
1 mA/20 mA
Functional Description
The 74F379 consists of four edge-triggered D-type flip-
flops with individual D inputs and Q and Q outputs. The
Clock (CP) and Enable (E) inputs are common to all flip-
flops. When the E is input HIGH, the register will retain the
present data independent of the CP input. The D
n
and E
inputs can change when the clock is in either state, pro-
vided that the recommended setup and hold times are
observed.
Truth Table
Inputs
E
H
L
L
CP
Outputs
D
n
X
H
L
Q
n
NC
H
L
Q
n
NC
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Transition
NC
=
No Change
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74F379
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
ESD Last Passing Voltage (Min)
twice the rated I
OL
(mA)
4000V
−
65
°
C to
+
150
°
C
−
55
°
C to
+
125
°
C
−
55
°
C to
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0
°
C to
+
70
°
C
+
4.5V to
+
5.5V
−
0.5V to V
CC
−
0.5V to
+
5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OS
I
CCL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Short-Circuit Current
Power Supply Current
−60
28
4.75
3.75
−0.6
−150
40
10% V
CC
5% V
CC
10% V
CC
2.5
2.7
0.5
5.0
7.0
50
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
V
V
µA
µA
µA
V
µA
mA
mA
mA
Min
Min
Min
Max
Max
Max
0.0
0.0
Max
Max
Max
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −1
mA
I
OH
= −1
mA
I
OL
=
20 mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
0V
V
O
=
LOW
3
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74F379
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
f
MAX
t
PLH
t
PHL
Maximum Clock Frequency
Propagation Delay
CP to Q
n
, Q
n
100
3.5
5.0
V
CC
= +5.0V
C
L
=
50 pF
Typ
140
5.0
6.5
6.5
8.5
Max
T
A
= −55°C
to
+125°C
V
CC
= +5.0V
C
L
=
50 pF
Min
75
3.0
4.0
8.5
10.0
Max
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
100
3.5
5.0
7.5
9.5
Max
MHz
ns
Units
AC Operating Requirements
T
A
= +25°C
Symbol
Parameter
V
CC
= +5.0V
Min
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
W
(H)
t
W
(L)
Setup Time, HIGH or LOW
D
n
to CP
Hold Time, HIGH or LOW
D
n
to CP
Setup Time, HIGH or LOW
E to CP
Hold Time, HIGH or LOW
E to CP
CP Pulse Width
HIGH or LOW
3.0
3.0
1.0
1.0
6.0
6.0
0
0
4.0
5.0
Max
T
A
= −55°C
to
+125°C
V
CC
= +5.0V
Min
4.0
4.0
2.0
2.0
8.0
8.0
0
0
5.0
7.0
Max
T
A
=
0°C to
+70°C
V
CC
= +5.0V
Min
Max
3.0
3.0
1.0
1.0
6.0
6.0
0
0
4.0
5.0
ns
ns
ns
Units
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4
74F379
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
5
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