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LH28F320S3TD 32M
(2Mb × 8/1Mb × 16
× 2 Banks) Smart 3
Dual Work Flash
Memory
DESCRIPTION
The LH28F320S3TD Dual Work flash memory with Smart 3
technology is a high-density, low-cost, nonvolatile, read/write
storage solution for a wide range of applications, having high
programming performance that is achieved through highly-
optimized page buffer operations. Its symmetrically-blocked
architecture, flexible voltage and enhanced cycling capability
make it a for highly flexible component suitable for resident flash
arrays, SIMMs and memory cards while enhanced suspend
capabilities make it an ideal solution for code and data storage
applications. For secure code storage applications, such as
networking, where code is either directly executed out of flash or
downloaded to DRAM, the LH28F320S3TD offers three levels of
protection: absolute protection with V
PP
at GND, selective
hardware block locking, or flexible software block locking. These
alternatives give designers ultimate control of their code security
needs. LH28F320S3TD conforms to the flash Scalable Command
Set (SCS) and the Common Flash Interface (CFI) specification
which enable universal and upgradable interface, enable the
highest system/device data transfer rates and minimize device and
system-level implementation costs.
FEATURES
• Smart 3 Dual Work technology
– 2.7 V or 3.3 V V
CC
– 2.7 V, 3.3 V or 5 V V
PP
– Capable of performing erase, write and read for each bank
independently (impossible to perform read from both banks
at a time).
• High-speed write performance
– Two 32-byte page buffers/bank
– 2.7 µs/byte write transfer rate
• Common Flash Interface (CFI)
– Universal and upgradable interface
• Scalable Command Set (SCS)
• High performance read access time
– 100 ns (3.3 ±0.3 V)/120 ns (2.7 V to 3.6 V)
• Enhanced automated suspend options
– Write suspend to read
– Block erase suspend to write
– Block erase suspend to read
• Enhanced data protection features
– Absolute protection with V
PP
= GND
– Flexible block locking
– Erase/write lockout during power transitions
• SRAM-compatible write interface
• User-configurable x8 or x16 operation
• High-density symmetrically-blocked architecture
– Sixty-four 64 k-byte erasable blocks
• Enhanced cycling capability
– 100,000 block erase cycles
– 3.2 million block erase cycles/bank
• Low power management
– Deep power-down mode
– Automatic power saving mode decreases I
CC
in static mode
• Automated write and erase
– Command user interface
– Status register
• ETOX
TM
V nonvolatile flash technology
• 56-pin TSOP Type I (TSOP056-P-1420) normal bend
package
This Product Information is from LH28F320S3TD-L10 Data Sheet.
Copyright ©1998, Sharp Electronics Corp. All rights reserved. All tradenames are the registered property of their respective owners. Specifications are subject to change without notice.
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