HV9308
HV9408
32-Channel Serial To Parallel Converter
With High Voltage Push-Pull Outputs
Ordering Information
Package Options
Device
Recommended
Operating
V
PP
max
80V
80V
44 J-Lead
Quad Ceramic
Chip Carrier
HV9308DJ
HV9408DJ
44 J-Lead
Quad Plastic
Chip Carrier
HV9308PJ
HV9408PJ
Dice in
Waffle Pack
HV9308X
HV9408X
44 J-Lead Quad
Ceramic Chip Carrier
(MIL-STD883 processed*)
RBHV9308DJ
RBHV9408DJ
HV9308
HV9408
*
For Hi-Rel process flows, please refer to page 5-3 in the Databook.
Features
s
Processed with HVCMOS
®
technology
s
Low power level shifting
s
Shift register speed 8MHz
s
Latched data outputs
s
5V CMOS compatible inputs
s
Forward and reverse shifting options
s
Diode to V
PP
allows efficient power recovery
s
44-lead ceramic surface mount package
s
Hi-Rel processing available
General Description
The HV93 and HV94 are low voltage serial to high voltage parallel
converters with push-pull outputs. These devices have been
designed for use as drivers for AC-electroluminescent displays.
They can also be used in any application requiring multiple output
high voltage current sourcing and sinking capabilities such as
driving plasma panels, vacuum fluorescent, or large matrix LCD
displays.
These devices consist of a 32-bit shift register, 32 latches, and
control logic to enable outputs. HV
OUT
1 is connected to the first
stage of the shift register through the Output Enable logic. Data is
shifted through the shift register on the low to high transition of the
clock. The HV94 shifts in the counterclockwise direction when
viewed from the top of the package and the HV93 shifts in the
clockwise direction. A data output buffer is provided for cascading
devices. This output reflects the current status of the last bit of the
shift register (32). Operation of the shift register is not affected by
the LE (latch enable) or the OE (output enable) inputs. Transfer
of data from the shift register to the latch occurs when the LE input
is high. The data in the latch is retained when LE is low.
Absolute Maximum Ratings
1
Supply voltage, V
DD2
Supply voltage, V
PP2
Logic input levels
2
Ground current
3
Continuous total power dissipation
4
Operating temperature range
Storage temperature range
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
Plastic
Ceramic
-0.5V to +7V
-0.5V to +90V
-0.5 to V
DD
+ 0.5V
1.5A
1200mW
1500mW
Plastic -40°C to 85°C
Ceramic -55°C to 125°C
-65°C to +150°C
260°C
Notes:
1. Device will survive (but operation may not be specified or guaranteed) at
these extremes.
2. All voltages are referenced to V
SS
.
3. Duty cycle is limited by the total power dissipated in the package.
4. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C for plastic and at 15mW/°C for ceramic.
12-165
HV9308/HV9408
Electrical Characteristics
(V
PP
= 60V, V
DD
= 5V, T
A
=25°C)
DC Characteristics
Symbol
I
PP
I
DDQ
I
DD
V
OH
(Data)
V
OL
(Data)
I
IH
I
IL
V
OC
V
OH
V
OL
Parameter
V
PP
Supply Current
I
DD
Supply Current (Quiescent)
I
DD
Supply Current (Operating)
Shift Register Output Voltage
Shift Register Output Voltage
Current Leakage, any input
Current Leakage, any input
HV
OUT
Output Clamp Diode Voltage
HV
OUT
Output when Sourcing
HV
OUT
Output when Sinking
52
4.0
V
DD
-0.5
0.5
1.0
-1.0
-1.5
Min
Max
100
100
15
Units
µA
µA
mA
V
V
µA
µA
V
V
V
Conditions
HV
OUT
outputs HIGH to LOW
All inputs = V
DD
or GND
V
DD
= V
DD
max,
f
CLK
= 8 MHz
I
O
= -100µA
I
O
= 100µA
Input = V
DD
Input = GND
I
OC
= -5mA
I
OH
= -20mA, 0 to 70°C
I
OL
= 5mA, 0 to 70°C
AC Characteristics
Symbol
f
CLK
t
WL
or t
WH
t
SU
t
H
t
DLH
(Data)
t
DHL
(Data)
t
DLE
t
WLE
t
SLE
t
ON
t
OFF
Parameter
Clock Frequency
Clock width, HIGH or LOW
Setup time before CLK rises
Hold time after CLK rises
Data Output Delay after L to H CLK
Data Output Delay after H to L CLK
LE Delay after L to H CLK
Width of LE Pulse
LE Setup Time before L to H CLK
Delay from LE to HV
OUT
, L to H
Delay from LE to HV
OUT
, H to L
50
50
50
500
500
62
25
10
110
110
Min
Max
8.0
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
L
= 15pF
C
L
= 15pF
Conditions
Recommended Operating Conditions
Symbol
V
DD
V
PP
V
IH
V
IL
f
CLK
T
A
Parameter
Logic Voltage Supply
High Voltage Supply
Input HIGH Voltage
Input LOW Voltage
Clock Frequency
Operating Free-Air Temperature
Plastic
Ceramic
Min
4.5
8.0
V
DD
-0.5
0
0
-40
-55
Max
5.5
80
V
DD
0.5
8.0
+85
+125
Units
V
V
V
V
MHz
°C
°C
Notes:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
DD
.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
4. Apply V
PP
.
Power-down sequence should be the reverse of the above.
The V
PP
should not drop below V
DD
during operations.
12-166
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