ADT7476
Remote Thermal Controller
and Voltage Monitor
The ADT7476 controller is a thermal monitor and multiple PWM
fan controller for noise-sensitive or power-sensitive applications
requiring active system cooling. The ADT7476 can drive a fan using
either a low or high frequency drive signal and can monitor the
temperature of up to two remote sensor diodes plus its own internal
temperature. The part also measures and controls the speed of up to
four fans, so the fans operate at the lowest possible speed for minimum
acoustic noise.
The automatic fan speed control loop optimizes fan speed
for a given temperature. The effectiveness of the system’s thermal
solution can be monitored using the THERM input. The ADT7476
also provides critical thermal protection to the system using the
bidirectional THERM pin as an output to prevent system or
component overheating.
Features
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QSOP−24 NB
CASE 492B
PIN ASSIGNMENT
SDA
SCL
GND
V
CC
VID0/GPIO0
VID1/GPIO1
VID2/GPIO2
VID3/GPIO3
1
2
3
4
5
6
7
8
24
PWM1/XTO
23
V
CCP
22
+2.5V
IN
/THERM
21
+12V
IN
/VID5
20
+5V
IN
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Monitors Up to Five Voltages
Controls and Monitors Up to Four Fans
High and Low Frequency Fan Drive Signal
One On-Chip and Two Remote Temperature Sensors
Extended Temperature Measurement Range Up to 191°C
Automatic Fan Speed Control Mode Controls System Cooling Based
on Measured Temperature
Enhanced Acoustic Mode Dramatically Reduces User Perception of
Changing Fan Speeds
Thermal Protection Feature via THERM Output
Monitors Performance Impact of Intel
®
Pentium
®
4 Processor
Thermal Control Circuit via THERM Input
3-wire and 4-wire Fan Speed Measurement
Limit Comparison of All Monitored Values
Meets SMBus 2.0 Electrical Specifications
This Device is Pb-Free, Halogen Free and is RoHS Compliant
ADT7476
(Top View)
19
VID4/GPIO4
18
D1+
17
D1−
16
D2+
15
D2−
14
*
13
PWM3/ADDREN
TACH3
9
PWM2/
10
SMBALERT
TACH1
11
TACH2
12
*TACH4/THERM/SMBALERT/GPIO6/ADDR SELECT
MARKING DIAGRAMS
ADT7476RQZ
#YYWW
xxxx
ADT7476RQZ
#
YYWW
xxxx
= Specific Device Code
= Pb-Free Package
= Date Code
= Assembly Lot Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 64 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
December, 2013
−
Rev. 9
1
Publication Order Number:
ADT7476/D
ADT7476
ADDREN
VID5/GPIO5
VID4/GPIO4
VID3/GPIO3
VID2/GPIO2
VID1/GPIO1
VID0/GPIO0
GPIO6
PWM1
PWM2
PWM3
TACH1
TACH2
TACH3
TACH4
PERFORMANCE
MONITORING
THERM
V
CC
D1+
D1−
D2+
D2−
+5V
IN
+12V
IN
+2.5V
IN
V
CCP
BAND GAP
TEMP. SENSOR
GND
V
CC
TO ADT7476
THERMAL
PROTECTION
ACOUSTIC
ENHANCEMENT
CONTROL
INPUT
SIGNAL
CONDITIONING
AND
ANALOG
MULTIPLEXER
10-BIT
ADC
INTERRUPT
STATUS
REGISTERS
LIMIT
COMPARATORS
VALUE AND
LIMIT
REGISTERS
FAN SPEED
COUNTER
PWM REGISTERS
AND CONTROLLERS
(HF AND LF)
AUTOMATIC
FAN SPEED
CONTROL
SMBus
ADDRESS
SELECTION
SERIAL BUS
INTERFACE
ADDRESS
POINTER
REGISTER
PWM
CONFIGURATION
REGISTERS
INTERRUPT
MASKING
ADDR
SELECT
SCL
SDA
SMBALERT
ADT7476
VID/GPIO
REGISTER
BAND GAP
REFERENCE
Figure 1. Functional Block Diagram
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Positive Supply Voltage (V
CC
)
Maximum Voltage on +12 V
IN
Pin
Maximum Voltage on +5.0 V
IN
Pin
Maximum Voltage on All Open-Drain Outputs
Input Current at Any Pin
Package Input Current
Maximum Junction Temperature (T
J MAX
)
Storage Temperature Range
Lead Temperature, Soldering
IR Reflow Peak Temperature
Pb-Free Peak Temperature
Lead Temperature (Soldering, 10 sec)
ESD Rating
Rating
3.6
16
6.25
3.6
±5
±20
150
−65
to +150
220
260
300
1,500
Unit
V
V
V
V
mA
mA
°C
°C
°C
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
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ADT7476
Table 2. THERMAL CHARACTERISTICS
(Note 1)
Package Type
24-lead QSOP
q
JA
122
q
JC
31.25
Unit
°C/W
1.
q
JA
is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 3. PIN ASSIGNMENT
Pin No.
1
2
3
4
5
6
7
8
9
10
Mnemonic
SDA
SCL
GND
V
CC
VID0/
GPIO0
VID1/
GPIO1
VID2/
GPIO2
VID3/
GPIO3
TACH3
PWM2/
SMBALERT
TACH1
TACH2
PWM3
ADDREN
Description
Digital I/O (Open Drain). SMBus bidirectional serial data. Requires SMBus pullup.
Digital Input (Open Drain). SMBus serial clock input. Requires SMBus pullup.
Ground Pin.
Power Supply. Powered by 3.3 V standby, if monitoring in low power states is required. V
CC
is also
monitored through this pin.
Digital Input. Voltage supply readouts from CPU. This value is read into the VID/GPIO register (0x43).
General-Purpose Open Drain Digital I/O.
Digital Input. Voltage supply readouts from CPU. This value is read into the VID/GPIO register (0x43).
General-Purpose Open Drain Digital I/O.
Digital Input. Voltage supply readouts from CPU. This value is read into the VID/GPIO register (0x43).
General-Purpose Open Drain Digital I/O.
Digital Input. Voltage supply readouts from CPU. This value is read into the VID/GPIO register (0x43).
General-Purpose Open Drain Digital I/O.
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 3.
Digital Output (Open Drain). Requires 10 kW typical pullup. Pulse width modulated output to control Fan 2
speed. Can be configured as a high or low frequency drive. Digital Output (Open Drain). This pin can be
reconfigured as an SMBALERT interrupt output to signal out-of-limit conditions.
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 1.
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 2.
Digital I/O (Open Drain). Pulse width modulated output to control the speed of Fan 3 and Fan 4. Requires
10 kW typical pullup. Can be configured as a high or low frequency drive.
If pulled low on powerup, the ADT7476 enters address select mode, and the state of Pin 14 (ADDR SELECT)
determines the ADT7476’s slave address.
Digital Input (Open Drain). Fan tachometer input to measure speed of Fan 4.
Alternatively, the pin can be reconfigured as a bidirectional THERM pin. Times and monitors assertions on
the THERM input. For example, it can be connected to the PROCHOT output of Intel’s Pentium
®
4
processor or to the output of a trip point temperature sensor. Can be used as an output to signal
overtemperature conditions.
Digital Output (Open Drain). This pin can be reconfigured as an SMBALERT interrupt output to signal
out-of-limit conditions.
General-Purpose Open Drain Digital I/O.
If in address select mode, the logic state of this pin defines the SMBus device address.
Cathode Connection to Second Thermal Diode.
Anode Connection to Second Thermal Diode.
Cathode Connection to First Thermal Diode.
Anode Connection to First Thermal Diode.
Digital Input. Voltage supply readouts from CPU. This value is read into the VID/GPIO register (0x43).
General-Purpose Open Drain Digital I/O.
Analog Input. Monitors 5.0 V power supply.
Analog Input. Monitors 12 V power supply.
Digital Input. Voltage supply readouts from CPU. This value is read into the VID/GPIO register (0x43).
Analog Input. Monitors 2.5 V supply, typically a chipset voltage.
Alternatively, this pin can be reconfigured as a bidirectional/omnidirectional THERM pin. Can be used to
time and monitor assertions on the THERM input. For example, can be connected to the PROCHOT
output of Intel’s Pentium
®
4 processor or to the output of a trip point temperature sensor. Can be used as
an output to signal overtemperature conditions.
Analog Input. Monitors processor core voltage (0 V to 3.0 V).
Digital Output (Open Drain). Pulse width modulated output to control the speed of Fan 1. Requires 10 kW
typical pullup.
Also functions as the output from the XOR tree in XOR test mode.
11
12
13
14
TACH4/
THERM/
SMBALERT/
GPIO6/
ADDR SELECT
15
16
17
18
19
20
21
22
D2–
D2+
D1–
D1+
VID4/
GPIO4
+5.0 V
IN
+12 V
IN
/
VID5
+2.5 V
IN
/
THERM
23
24
V
CCP
PWM1/
XTO
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ADT7476
Table 4. ELECTRICAL CHARACTERISTICS
(T
A
= T
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted.) (Note 1)
Parameter
Power Supply
Supply Voltage
Supply Current, I
CC
Temperature-to-Digital Converter
Local Sensor Accuracy
Resolution
Remote Diode Sensor Accuracy
Resolution
Remote Sensor Source Current
0°C
≤
T
A
≤
85°C
−40°C
≤
T
A
≤
125°C
0°C
≤
T
A
≤
85°C
−40°C
≤
T
A
≤
125°C
Low Level
High Level
For 12 V Channel
For All Other Channels
8 Bits
Averaging Enabled
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
70
70
−
−
−
Fan Count = 0xBFFF
Fan Count = 0x3FFF
Fan Count = 0x0438
Fan Count = 0x021C
−
−
−
−
−
I
OUT
=
−8.0
mA
V
OUT
= V
CC
I
OUT
=
−4.0
mA
V
OUT
= V
CC
−
−
−
−
2.0
−
−
Maximum Input Voltage
Minimum Input Voltage
2.0
−0.3
−
±0.5
−
0.25
±0.5
−
0.25
11
180
−
−
−
±0.1
11
12
38
145
19
120
114
−
−
−
109
329
5,000
10,000
−
−
0.1
−
0.1
−
−
500
−
−
0.5
±1.5
±2.5
−
±1.5
±2.5
−
−
−
±2
±1.5
±1
−
−
−
−
−
−
−
−
±6
±10
65,535
−
−
−
−
8.0
0.4
20
0.4
1.0
−
0.8
−
3.6
0.8
−
RPM
°C
Interface Inactive, ADC Active
3.0
−
3.3
1.5
3.6
3.0
V
mA
Conditions
Min
Typ
Max
Unit
°C
mA
Analog-to-Digital Converter (Including MUX and Attentuators)
Total Unadjusted Error (TUE)
Differential Non-linearity (DNL)
Power Supply Sensitivity
Conversion Time
Voltage Input
Local Temperature
Remote Temperature
Total Monitoring Cycle Time
Input Resistance
Fan RPM-to-Digital Converter
Accuracy
Full-Scale Count
Nominal Input RPM
0°C
≤
T
A
≤
70°C
−40°C
≤
T
A
≤
+120°C
%
%
LSB
%/V
ms
Averaging Enabled
Averaging Disabled
For V
CCP
channel
For all other channels
ms
kW
Open-Drain Digital Outputs, PWM1 TO PWM3, XTO
Current Sink, I
OL
Output Low Voltage, V
OL
High Level Output Current, I
OH
Output Low Voltage, V
OL
High Level Output Current, I
OH
SMBus Digital Inputs (SCL, SDA)
(Note 2)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis
Digital Input Logic Levels (TACH Inputs)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis
V
V
V p-p
V
V
mV
mA
V
mA
V
mA
Open-Drain Serial Data Bus Output (SDA)
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ADT7476
Table 4. ELECTRICAL CHARACTERISTICS
(T
A
= T
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted.) (Note 1)
Parameter
Digital Input Logic Levels (THERM) ADTL+
Input High Voltage, V
IH
Input Low Voltage, V
IL
Digital Input Current
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance, C
IN
Serial Bus Timing
(See Figure 2)
Clock Frequency, f
SCLK
Glitch Immunity, t
SW
Bus Free Time, t
BUF
SCL Low Time, t
LOW
SCL High Time, t
HIGH
SCL, SDA Rise Time, t
r
SCL, SDA Fall Time, t
f
Data Setup Time, t
SU;DAT
Detect Clock Low Timeout, t
TIMEOUT
Can be Optionally Disabled
10
−
4.7
4.7
4.0
−
−
250
15
−
−
−
−
−
−
−
−
−
400
50
−
−
50
1,000
300
−
35
kHz
ns
ms
ms
ms
ns
ms
ns
ms
V
IN
= V
CC
V
IN
= 0 V
−
−
−
±1
±1
5.0
−
−
−
mA
mA
pF
0.75 x V
CCP
−
−
−
−
0.8
V
V
Conditions
Min
Typ
Max
Unit
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. All voltages are measured with respect to GND, unless otherwise specified. Typical voltages are T
A
= 25°C and represent a parametric norm.
Logic inputs accept input high voltages up to V
MAX
, even when the device is operating down to V
MIN
. Timing specifications are tested at logic
levels of V
IL
= 0.8 V for a falling edge, and V
IH
= 2.0 V for a rising edge.
2. SMBus timing specifications are guaranteed by design and are not production tested.
t
LOW
SCL
t
F
t
R
t
HD; STA
t
HD; STA
t
HD; DAT
t
HIGH
t
SU; DAT
t
SU; STA
t
SU; STO
SDA
P
t
BUF
S
S
P
Figure 2. Serial Bus Timing Diagram
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