DEMO CIRCUIT 1 3 5 4
LT1641-1, LT1641-2, LT4256-1, AND
RT G UIDE
Q UICK S TA
LT4256-2
L T1 6 4 1 -1 , L T1 6 4 1 -2, L T4 25 6 -1 , a n d L T4 25 6 -2
P o s itiv e H ig h V o lta g e H o t S w a p Co n tro lle r
DESCRIPTION
Demonstration circuit 1354 is a Positive High Voltage
Hot Sw ap Controller f
eaturing either the LT1641-1,
LT1641-2, LT4256-1, or LT4256-2.
The board f
acilitates measurement of transient condi-
tions, steady state operation w ith dif erent loads, and
f
f conditions. The Controller responds to f condi-
ault
ault
tions such as input undervoltage(UV), output pow er
good (PW RGD) f
ault, and overcurrent and response can
be verif by the output voltage (VOUT) LED state and
ied
PW RGD pin signal.
The LT1641-1 and LT4256-1 latch of , if M OSFET shuts
f
of under overcurrent condition, w hile LT1641-2 and
f
LT4256-2 automatically restart af time-out delay.
ter
The DC1354 contains one Hot Sw ap Controller, pow er
M OSFET, current sense resistor, enable circuit, input
voltage clamp, gate protection circuit, resistive output
voltage divider f f
or eedback signal, and three LEDs to
indicate the presence of input and output voltages and
pow er good condition.
Design f f this circuit board are available. Call the
iles or
LTC f
actory.
L
, LTC, LTM , LT, Burst M ode, OPTI-LOOP, Over-The-Top and PolyPhase are registered
trademarks ofLinear Technology Corporation. Adaptive Pow er, C-Load, DirectSense, Easy
Drive, FilterCAD, Hot Sw ap, LinearView , µM odule, M icropow er Sw itcherCAD, M ultimode
Dimming, No Latency , No Latency Delta-Sigma, No R
SENSE
, Operational Filter, PanelProtect,
Pow erPath, Pow erSOT, SmartStart, Sof
tSpan, Stage Shedding, Sw itcherCAD, ThinSOT,
UltraFast and VLDO are trademarks ofLinear Technology Corporation. Other product names
may be trademarks ofthe companies that manuf
acture the products.
PERF ORM A NCE SU M M A RY
SYM BOL
V
CC
V
LKO
V
UNLH
V
FB
PAR AM ETER
Operating Voltage
V
CC
Undervoltage Lockout
Undervoltage Threshold
Feedback Voltage Threshold
Speci i i are atTA = 25°C
f cat ons
CON DI ON S
TI
LT1641
LT4256
LT1641
LT4256
LT1641, O N pin voltage Low to High transition
LT4256, U V pin voltage Low to High transition
LT1641, FB Low -to-High Transition,
FB High-to-Low Transition
LT4256, FB Low -to-High Transition,
FB High-to-Low Transition
MI
N
9.0
10.8
7.5
1.280
3.96
1.280
1.221
3.95
4.2
8
39
5.5
45
4.5
10
4.5
10
5
16
35
40
TYP
V
SENSETRIP
SENSE Pin Trip-Voltage(V
CC
-V
SENSE
)
LT1641,
V
FB =0V
V
FB =1V,
V
FB
≥
2V
LT1641,
V
GATE-
V
CC,
10.8V
≤V
CC
≤20V
20 V
≤V
CC
≤
80V,
LT4256,
V
GATE-
V
CC, 10.8
≤V
CC
≤
20V
20 V
≤V
CC
≤
80V,
LT1641
LT4256
LT1641
LT4256
LT4256,
V
FB =0V,
8.3
9.8
1.313
4
1.313
1.233
3.99
4.45
12
47
14
55
M AX
80
80
8.8
1.345
4.04
1.345
1.245
4.03
4.65
17
55
22
65
18
18
12.5
12.8
20
63
100
80
∆V
GATE
External N-Channel Gate Drive
I
GATEUP
I
GATEDN
GATE Pin Pull-Up Current
GATE Pin Pull-Dow n Current
8.8
11.6
10
32
70
62
UNI
TS
V
V
V
V
V
V
V
V
V
V
mV
mV
mV
mV
V
V
V
V
µA
µA
mA
mA
1
LT1641-1, LT1641-2, LT4256-1, AND LT4256-2
OPERA TING PRINCIPL ES
The LT1641-1, LT1641-2, LT4256-1, and LT4256-2 are
Positive High Voltage Hot Sw ap Controllers that have
absolute maximum supply voltage (V
CC
) 100V and oper-
ating range (9-80) V f LT1641 and (10.8-80) V f
or
or
LT4256. In the DC1354A any controller operates on the
+48V rail. Each board can easily be readj
usted f any
or
rated voltage by replacing the enable circuit (R5, R11),
input voltage clamp (D1), gate protection circuit (R8,
R14, D3, D6), and resistive output voltage divider (R10,
R12). The DC1354A as supplied by the f
actory is assem-
bled w ith the SUM 90N10-8m2p M OSFET in a D2PAK
package and 7mΩ current sense resistor (R1).
Q U ICK STA RT PROCEDU RE
Demonstration circuit DC1354 is easy to set up to evalu-
ate the perf
ormance of the LT1641-1, LT1641-2,
LT4256-1, and LT4256-2. Ref Figure 1 f proper
er
or
measurement equipment setup and f
ollow the procedure
below .
The board test is perf
ormed in several steps by measur-
ing some transient parameters and verif
ying successf
ul
or f
ailed pow er up actions under def
ined conditions. In
all test steps turn on sw itch SW _PS to connect demo
board to the +48V pow er supply, turn on sw itch SW _PS
to activate controller (connecting the ENABLE pin to the
VIN +48V) and turn +48V of f resetting controller af
f or
ter
f
ault.
1.
It should be noted that loading parameters such as
Low Capacitive Load, H igh Capacitive Load, Low
R esistive Load, and H igh R esistive are dif erent f
f
or
LT4256 and f LT1641. These parameters are
or
show n below separately f each controller:
or
LTC1641
G
G
G
G
G
High Resistive load 5.0
Ω
.
2.
Place a scope probe to the VO U T turret, turn on
controller, and measure a pow er-up time w ith no
load. For LT4256 this time must be in the range
(13.7 - 54) ms, and f LT1641- (43 - 173) ms.
or
3.
Connect Low Capacitive Load to the output of hot
sw ap circuitry (VO U T +48V turret). Turn on control-
ler. This pow er up should be successf and tw o
ul
LEDs (VO U T – green - and PW R GD - orange) must
light.
NOTE.
The f
ollow ing tests verif loaded Controller perf
y
ormance. The
transients w ith Low Load should be successf completed, w hile
ully
transients w ith High Load should f The LT1641-1 and LT4256-1 in the
ail.
overcurrent f condition are latched of, w hile the LT1641-2 and
ault
f
LT4256-2 provide retry. To avoid pow er M OSFET damage in the LT1641-
2 and LT4256-2 High Load tests keep sw itch SW _ON in the on position
very short time.
4.
Connect H igh Capacitive Load to the output of hot
sw ap circuitry (VO U T +48V turret). Turn on control-
ler. This pow er up should be unsuccessf and tw o
ul,
LEDs remaining of w ill conf this.
f
irm
For LT4256-1 and LT1641-1 the f
ailed pow er-up is in-
dicated by the VOUT (green) and PW RGD (orange)
LED lights remaining of . Disconnect the ENABLE tur-
f
ret f
rom the VIN +48V turret f short time and con-
or
nect them again. The controller should be latched of
f
in the shut of mode,
f
For LT4256-2 and LT1641-2 make short time connec-
tion of the ENABLE turret and VIN +48V. The VOUT
(green) and PW RGD (orange) LED w ill blink indicating
an autoretry in the f
ailed pow er up.
Low Capacitive load 1000uF,
High Capacitive load 8700uF,
Low Resistive load 10
Ω,
50W ,
High Resistive load 5.5
Ω
.
Low Capacitive load 250uF,
High Capacitive load 3500uF,
Low Resistive load 11
Ω,
50W ,
LTC4256
G
G
G
2
LT1641-1, LT1641-2, LT4256-1, AND LT4256-2
5.
Load output w ith Low R esistive Load. Controller
should successf keep this load.
ully
6.
Turn controller on. Load output w ith H igh R esistive
Load. Controller should f to keep this load.
ail
7.
Verif that controller alive af overload test.
y
ter
NOTE.
In the designing ofthe pow er-up transient w ith mentioned
Controllers special attention should be paid to correspondence betw een
pow er M OSFET saf operating area and transient parameters (current
e
limit level, duration ofthe transient, relationship betw een capacitive load
and resistive load and timer period).
Fi
gure 1. Proper M easurem entEqui entSet
pm
up
3
LT1641-1, LT1641-2, LT4256-1, AND LT4256-2
4
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