534FA000475DG datasheet, PDF - EEWORLD Datasheet

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534FA000475DG: DescriptionLVDS Output Clock Oscillator, 10MHz Min, 945MHz Max,; CategoryPassive components oscillator; File Size119KB，12 Pages; ManufacturerSkyworks; Websitehttp://www.skyworksinc.com; Environmental Compliance

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534FA000475DG Overview

LVDS Output Clock Oscillator, 10MHz Min, 945MHz Max,

534FA000475DG Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	4037650780
Reach Compliance Code	compliant
Other features	TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; SELECTABLE O/P FREQ
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Installation features	SURFACE MOUNT
Number of terminals	8
Maximum operating frequency	945 MHz
Minimum operating frequency	10 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
Output load	100 OHM
Encapsulate equivalent code	LCC8,.2X.28,100
physical size	7.0mm x 5.0mm x 1.8mm
longest rise time	0.35 ns
Filter level	MIL-STD-883
Maximum slew rate	98 mA
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Gold (Au) - with Nickel (Ni) barrier

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Si534

EVISION

UAD

R E Q U E N C Y

RYSTAL

S C I L L A T O R

(XO)

(10 M H

Z TO

1.4 G H

)

Features

Available with any-rate output



frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz



Four selectable output frequencies



3rd generation DSPLL with superior



jitter performance



3x better frequency stability than

SAW-based oscillators



Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout



Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications



SONET/SDH



Networking



SD/HD video



Test and measurement



Clock and data recovery



FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

Description

The Si534 quad frequency XO utilizes Silicon Laboratories’ advanced

DSPLL

circuitry to provide a low jitter clock at high frequencies. The Si534

is available with any-rate output frequency from 10 to 945 MHz and select

frequencies to 1400 MHz. Unlike a traditional XO where a different crystal is

required for each output frequency, the Si534 uses one fixed crystal to

provide a wide range of output frequencies. This IC-based approach allows

the crystal resonator to provide exceptional frequency stability and reliability.

In addition, DSPLL clock synthesis provides superior supply noise rejection,

simplifying the task of generating low jitter clocks in noisy environments

typically found in communication systems. The Si534 IC-based XO is factory

configurable for a wide variety of user specifications including frequency,

supply voltage, output format, and temperature stability. Specific

configurations are factory programmed at time of shipment, thereby

eliminating long lead times associated with custom oscillators.

FS[1]

CLK–

GND

FS[0]

CLK+

(LVDS/LVPECL/CML)

FS[1]

Functional Block Diagram

CLK– CLK+

FS[1]

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

FS[0]

CLK

(CMOS)

GND

Rev. 1.3 4/13

Si534

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