High Frequency FETs
3SK143
Silicon N-Channel 4-pin MOS FET
For UHF high-gain and low-noise amplification
unit: mm
+0.2
2.8
–0.3
M
Di ain
sc te
on na
tin nc
ue e/
d
s
Features
0.65±0.15
2.9±0.2
1.9±0.2
1.5
–0.3
+0.2
0.65±0.15
+0.2
1.1
–0.1
Parameter
Symbol
Ratings
15
Unit
V
V
V
Drain to Source voltage
V
DS
Gate 2 to Source voltage
Drain current
V
G2S
I
D
P
D
±8
±30
200
150
mA
Allowable power dissipation
Channel temperature
Storage temperature
mW
°C
°C
1: Source
2: Drain
3: Gate2
4: Gate1
Mini Type Package (4-pin)
T
ch
T
stg
−55
to +150
Marking Symbol: 3D
s
Electrical Characteristics
(Ta = 25°C)
Parameter
Symbol
Drain to Source cut-off current
Gate 1 cut-off current
Gate 2 cut-off current
I
DSS*2
I
G1SS
I
G2SS
Conditions
min
0.2
typ
0 to 0.1
Gate 1 to Source voltage
V
G1S
±8
0.4±0.2
0.8
max
13
V
DS
= 10V, V
GS
= 0, V
G2S
= 4V
V
DS
= V
G2S
= 0, V
G1S
= ±8V
V
DS
= V
G1S
= 0, V
G2S
= ±8V
ue
±20
±20
0.16
–0.06
s
Absolute Maximum Ratings
(Ta = 25°C)
co
Drain to Source voltage
V
DSX*1
V
G1SC
V
G2SC
| Y
fs
|
C
oss
PG
NF
is
Gate 1 to Source cut-off voltage
e/
D
Gate 2 to Source cut-off voltage
Output capacitance (Common Source)
en
a
Input capacitance (Common Source) C
iss
Reverse transfer capacitance (Common Source) C
rss
nc
Forward transfer admittance
ai
*1
*2
R
D
= 56Ω and R
S
= 270Ω
I
DSS
rank classification
Rank
I
DSS
(mA)
O
0.2 to 1.5
3DO
P
0.5 to 4
3DP
Q
3 to 13
3DQ
Marking Symbol
Pl
Noise figure
ea
M
Power gain
pl d in
an c
se
ed lud
pl
vi
an m m es
si
tf
ed ain ai fo
ol
lo dis dis ten nte llow
ht w c
tp in o co an nan in
:// g nt n ce c g
pa U in tin t e fo
na RL ue ue ype typ ur
so a d t d
e Pr
od
ni bo yp typ
c. u e e
uc
ne t l
d
tl
at
ife
t/s e
cy
c/ st
en in
cl
e
fo
st
rm
ag
at
e.
io
n.
0.5R
0.95
4
1
0.95
3
2
+0.1
q
Low noise-figure (NF)
q
Large power gain PG
q
Mini-type package, allowing downsizing of the sets and automatic
insertion through the tape/magazine packing.
Unit
mA
nA
nA
V
V
V
nt
in
I
D
= 100µA, V
G1S
=
−5V,
V
G2S
= 0
V
DS
= 10V, V
G2S
= 0, I
D
= 100µA
15
V
DS
= 10V, V
G2S
= 4V, I
D
= 100µA
−3
−1
12
0
2
V
DS
= 10V, I
D
= 10mA, V
G2S
= 4V, f = 1kHz
V
DS
= 10V, V
G1S
= V
G2S
=
−5V
f = 1MHz
20
28
mS
pF
pF
pF
1.4
0.6
1.9
0.9
2.4
1.2
nt
0.02
15
V
DS
= 8V, I
D
= 8mA, V
G2S
= 3V
f = 800MHz
13
dB
dB
5
0.4
–0.05
+0.1
1
High Frequency FETs
P
D
Ta
320
24
V
G2S
=4V
Ta=25˚C
20
30
3SK143
I
D
V
DS
36
V
DS
=10V
Ta=25˚C
I
D
V
G1S
V
G2S
=4V
3V
2V
Allowable power dissipation P
D
(mW)
280
Drain current I
D
(mA)
16
V
G1S
=0.6V
12
0.4V
8
0.2V
4
0V
– 0.2V
– 0.4V
0
2
4
6
8
10
12
Drain current I
D
(mA)
240
200
160
120
80
40
0
0
20
40
60
80 100 120 140 160
24
18
1V
12
6
0V
–1
0
1
2
3
4
0
0
–2
Ambient temperature Ta (˚C)
Drain to source voltage V
DS
(V)
Gate 1 to source voltage V
G1S
(V)
| Y
fs
|
V
G1S
36
C
iss
, C
oss
V
DS
Input capacitance (Common source),
Output capacitance (Common source) C
iss
,C
oss
(pF)
V
DS
=10V
f=1kHz
Ta=25˚C
2.4
V
G1S
=V
G2S
=–5V
f=1MHz
Ta=25˚C
24
PG
V
G1S
V
DS
=8V
f=800MHz
Ta=25˚C
Forward transfer admittance |Y
fs
| (mS)
30
2.0
20
24
V
G2S
=5V
18
3V 4V
2V
6
0V
–1
0
1
2
3
1V
1.6
C
iss
Power gain PG (dB)
16
V
G2S
=4V
12
1.2
12
0.8
C
oss
8
3V
1V
4
2V
0.4
0
–2
0
0.1
0.3
1
3
10
30
100
0
–2
–1
0
1
2
3
Gate 1 to source voltage V
G1S
(V)
Drain to source voltage V
DS
(V)
Gate 1 to source voltage V
G1S
(V)
NF
V
G1S
24
V
DS
=8V
f=800MHz
Ta=25˚C
30
PG
V
G2S
V
DS
=8V
f=800MHz
Ta=25˚C
12
I
D
V
G1S
V
DS
=10V
V
G2S
=4V
10
20
20
16
10
Drain current I
D
(mA)
Noise figure NF (dB)
Power gain PG (dB)
8
12
V
G2S
=1V
0
6
2V
3V
8
4V
4
–10
4
Ta=75˚C
25˚C
–25˚C
–20
2
0
–2
–1
0
1
2
3
–30
–2
0
2
4
6
8
0
–2.0
–1.6
–1.2
– 0.8
– 0.4
0
Gate 1 to source voltage V
G1S
(V)
Gate 2 to source voltage V
G2S
(V)
Gate 1 to source voltage V
G1S
(V)
2
Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1)
If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products, and no license is granted under any intellectual property right or other right owned by our company or any other
company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other
company which may arise as a result of the use of technical information described in this book.
(3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office
equipment, communications equipment, measuring instruments and household appliances).
Consult our sales staff in advance for information on the following applications:
–
Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support
systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the prod-
ucts may directly jeopardize life or harm the human body.
–
Any applications other than the standard applications intended.
(4) The products and product specifications described in this book are subject to change without notice for modification and/or im-
provement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product
Standards in advance to make sure that the latest specifications satisfy your requirements.
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any
defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.
(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which
damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.
(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of Matsushita
Electric Industrial Co., Ltd.
Test/Measurement
京公网安备 11010802033920号
EEWORLD
