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BSH105

Description
N-channel enhancement mode mos transistor
CategoryDiscrete semiconductor    The transistor   
File Size146KB,7 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric View All

BSH105 Overview

N-channel enhancement mode mos transistor

BSH105 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSOT-23
package instructionSMALL OUTLINE, R-PDSO-G3
Contacts3
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresLOGIC LEVEL COMPATIBLE
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage20 V
Maximum drain current (Abs) (ID)1.05 A
Maximum drain current (ID)1.05 A
Maximum drain-source on-resistance0.25 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)0.417 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature30
transistor applicationsSWITCHING
Transistor component materialsSILICON
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
FEATURES
• Very low threshold voltage
• Fast switching
• Logic level compatible
• Subminiature surface mount
package
BSH105
SYMBOL
d
QUICK REFERENCE DATA
V
DS
= 20 V
I
D
= 1.05 A
g
R
DS(ON)
250 mΩ (V
GS
= 2.5 V)
V
GS(TO)
0.4 V
s
GENERAL DESCRIPTION
N-channel, enhancement mode,
logic level, field-effect power
transistor. This device has very low
threshold voltage and extremely
fast switching making it ideal for
battery powered applications and
high speed digital interfacing.
The BSH105 is supplied in the
SOT23
subminiature
surface
mounting package.
PINNING
PIN
1
2
3
gate
source
drain
DESCRIPTION
SOT23
3
Top view
1
2
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
, T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
CONDITIONS
R
GS
= 20 kΩ
T
a
= 25 ˚C
T
a
= 100 ˚C
T
a
= 25 ˚C
T
a
= 25 ˚C
T
a
= 100 ˚C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
20
20
±
8
1.05
0.67
4.2
0.417
0.17
150
UNIT
V
V
V
A
A
A
W
W
˚C
THERMAL RESISTANCES
SYMBOL
R
th j-a
PARAMETER
Thermal resistance junction to
ambient
CONDITIONS
FR4 board, minimum
footprint
TYP.
300
MAX.
-
UNIT
K/W
August 1998
1
Rev 1.000
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