CBT3384
10-bit bus switch with 5-bit output enables
Rev. 06 — 2 November 2009
Product data sheet
1. General description
The CBT3384 provides ten bits of high-speed TTL-compatible bus switching. The low
ON resistance of the switch allows connections to be made with minimal propagation
delay.
The CBT3384 device is organized as two 5-bit bus switches with two separate output
enable (1OE, 2OE) inputs. When nOE is LOW, the switch is on and port A is connected to
the B port. When nOE is HIGH, each switch is disabled.
The CBT3384 is characterized for operation from
−40 °C
to +85
°C.
2. Features
I
I
I
I
I
I
5
Ω
switch connection between two ports
TTL-compatible control input levels
Multiple package options
See CBTD3384 for CBT3384 with level shifting diodes
Latch-up protection exceeds 100 mA per JESD78
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
CDM JESD22-C101C exceeds 1000 V
3. Ordering information
Table 1.
Type
number
CBT3384D
Ordering information
Package
Temperature range Name
−40 °C
to +85
°C
SO24
SSOP24
Description
plastic small outline package; 24 leads; body width 7.5 mm
plastic shrink small outline package; 24 leads;
body width 5.3 mm
Version
SOT137-1
SOT340-1
SOT556-1
SOT355-1
CBT3384DB
−40 °C
to +85
°C
CBT3384DK
−40 °C
to +85
°C
CBT3384PW
−40 °C
to +85
°C
SSOP24
[1]
plastic shrink small outline package; 24 leads; body
width 3.9 mm; lead pitch 0.635 mm
TSSOP24
plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
[1]
Also known as QSOP24 package
NXP Semiconductors
CBT3384
10-bit bus switch with 5-bit output enables
4. Functional diagram
3
2
1A1
1B1
1A5
11
10
1B5
1OE
1
2A1
14
15
2B1
2A5
22
23
2B5
2OE
13
001aak877
Fig 1.
Logic diagram
5. Pinning information
5.1 Pinning
CBT3384
1OE
1B1
1A1
1A2
1B2
1B3
1A3
1A4
1B4
1
2
3
4
5
6
7
8
9
24 V
CC
23 2B5
22 2A5
21 2A4
20 2B4
19 2B3
18 2A3
17 2A2
16 2B2
15 2B1
14 2A1
13 2OE
001aak878
CBT3384
1OE
1B1
1A1
1A2
1B2
1B3
1A3
1A4
1B4
1
2
3
4
5
6
7
8
9
24 V
CC
23 2B5
22 2A5
21 2A4
20 2B4
19 2B3
18 2A3
17 2A2
16 2B2
15 2B1
14 2A1
13 2OE
001aak879
1B5 10
1A5 11
GND 12
1B5 10
1A5 11
GND 12
Fig 2.
Pin configuration for SO24 (SOT137-1)
Fig 3.
Pin configuration for SSOP24 (SOT340-1) and
TSSOP24 (SOT355-1)
CBT3384_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 2 November 2009
2 of 14
NXP Semiconductors
CBT3384
10-bit bus switch with 5-bit output enables
CBT3384
1OE
1B1
1A1
1A2
1B2
1B3
1A3
1A4
1B4
1
2
3
4
5
6
7
8
9
24 V
CC
23 2B5
22 2A5
21 2A4
20 2B4
19 2B3
18 2A3
17 2A2
16 2B2
15 2B1
14 2A1
13 2OE
001aak880
1B5 10
1A5 11
GND 12
Fig 4.
Pin configuration for SSOP24 (SOT556-1)
5.2 Pin description
Table 2.
Symbol
1OE, 2OE
1A1 to 1A5
2A1 to 2A5
1B1 to 1B5
2B1 to 2B5
GND
V
CC
Pin description
Pin
1, 13
3, 4, 7, 8, 11
14, 17, 18, 21, 22
2, 5, 6, 9, 10
15, 16, 19, 20, 23
12
24
Description
output enable input (active LOW)
data input/output (A port)
data input/output (A port)
data input/output (B port)
data input/output (B port)
ground (0 V)
positive supply voltage
6. Functional description
Table 3.
Input
1OE
L
L
H
H
[1]
Function selection
[1]
Input/output
2OE
L
H
L
H
1An, 1Bn
1An = 1Bn
1An = 1Bn
Z
Z
2An, 2Bn
2An = 2Bn
Z
2An = 2Bn
Z
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
CBT3384_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 2 November 2009
3 of 14
NXP Semiconductors
CBT3384
10-bit bus switch with 5-bit output enables
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
T
amb
=
−
40
°
C to +85
°
C, unless otherwise specified.
Symbol
V
CC
V
I
I
O
I
IK
T
stg
[1]
Parameter
supply voltage
input voltage
output current
input clamping current
storage temperature
Conditions
[2]
Min
−0.5
−0.5
-
−50
−65
Max
+7.0
+7.0
±128
-
+150
Unit
V
V
mA
mA
°C
V
O
< 0 V
V
I/O
= 0 V
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under
Section 8.
is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
[2]
8. Recommended operating conditions
Table 5.
Operating conditions
All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation.
Symbol
V
CC
V
IH
V
IL
T
amb
Parameter
supply voltage
HIGH-state input voltage
LOW-state input voltage
ambient temperature
operating in free air
Conditions
Min
4.5
2.0
-
−40
Typ
-
-
-
-
Max
5.5
-
0.8
+85
Unit
V
V
V
°C
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
V
IK
I
I
I
CC
∆I
CC
V
pass
C
I
C
io(off)
Parameter
input clamping voltage
input leakage current
supply current
additional supply current
pass voltage
input capacitance
off-state input/output
capacitance
Conditions
V
CC
= 4.5 V; I
I
=
−18
mA
V
CC
= 5.5 V; V
I
= GND or 5.5 V
V
CC
= 5.5 V; I
O
= 0 mA;
V
I
= V
CC
or GND
per input pin; V
CC
= 5.5 V; one input at
3.4 V, other inputs at V
CC
or GND
output HIGH; V
I
= V
CC
= 5.0 V;
I
O
=
−100 µA
control pins; V
I
= 3 V or 0 V
port off; V
I
= 3 V or 0 V; nOE = V
CC
[2]
T
amb
=
−40 °C
to +85
°C
Min
-
-
-
-
3.6
-
-
Typ
[1]
-
-
-
-
3.9
4.0
10.0
Max
−1.2
±1
3
2.5
4.2
-
-
Unit
V
µA
µA
mA
V
pF
pF
CBT3384_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 2 November 2009
4 of 14
NXP Semiconductors
CBT3384
10-bit bus switch with 5-bit output enables
Table 6.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol
R
ON
Parameter
ON resistance
Conditions
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 64 mA
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 30 mA
V
CC
= 4.5 V; V
I
= 2.4 V; I
I
=
−15
mA
[1]
[2]
[3]
All typical values are at V
CC
= 5 V, T
amb
= 25
°C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
Measured by the voltage drop between the nAn and the nBn terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nAn or nBn) terminals.
[3]
[3]
[3]
T
amb
=
−40 °C
to +85
°C
Min
-
-
-
Typ
[1]
5
5
10
Max
7
7
15
Unit
Ω
Ω
Ω
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see
Figure 7.
Symbol Parameter
t
pd
propagation delay
Conditions
Min
nAn, nBn to nBn, nAn;
see
Figure 5
V
CC
= 5.0 V
±
0.5 V
t
PZH
OFF-state to HIGH
propagation delay
OFF-state to LOW
propagation delay
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
nOE to nAn or nBn;
see
Figure 6
V
CC
= 5.0 V
±
0.5 V
t
PZL
nOE to nAn or nBn;
see
Figure 6
V
CC
= 5.0 V
±
0.5 V
t
PHZ
nOE to nAn or nBn;
see
Figure 6
V
CC
= 5.0 V
±
0.5 V
t
PLZ
nOE to nAn or nBn;
see
Figure 6
V
CC
= 5.0 V
±
0.5 V
[1]
[2]
[1][2]
T
amb
= 25
°C
Typ
Max
T
amb
=
−40 °C
to +85
°C
Unit
Min
Max
-
-
0.25
-
0.25
ns
1.2
2.3
5.7
1.2
5.6
ns
1.2
2.3
5.7
1.2
6.0
ns
1.7
3.6
5.2
1.7
5.5
ns
1.7
2.7
5.2
1.7
6.6
ns
The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
t
pd
is the same as t
PLH
and t
PHL
.
CBT3384_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 2 November 2009
5 of 14
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