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CS33-100MGKD0016

Description
dual value chip resistors, center tap
File Size85KB,3 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet View All

CS33-100MGKD0016 Overview

dual value chip resistors, center tap

CS 33
Vishay Sfernice
Dual Value Chip Resistors, Center Tap
FEATURES
Center tap feature
Small size 30 mil x 30 mil
Very high ohmic values (up to 5 MΩ)
Good stability 0.1 % (2000 h, rated power,
at + 70 °C)
Actual Size
Wirebondable
Chromium silicon thin film is very well suited to produce high
density and high ohmic value resistor chips. Performances
and sizes are greatly improved compared to Thick Film
counterparts. The center tap configuration offers a greater
flexibility for hybrid layout design.
TYPICAL PERFORMANCE
ABS
TCR
100 ppm/°C
ABS
TOL.
0.5 %
TRACKING
5 ppm/°C
RATIO
0.5 %
SCHEMATIC
R
T
R
1
R
2
R
T
= R
1
+ R
2
with
R
1
= R
2
Standard
STANDARD ELECTRICAL SPECIFICATIONS
TEST
MATERIAL
Resistance range
Tracking
TCR:
Absolute
Ohmic value
Tolerance:
Matching
Power rating
Stability
Voltage coefficient
Working voltage
Operating temperature range
Storage temperature range
Noise
Thermal EMF
Shelf life stability
± 0.5 % standard
250 mW at + 25 °C, 125 mW at + 70 °C, 50 mW at + 125 °C
± 0.1 % typical, ± 0.2 maximum
0.1 ppm/V
100 V
DC
on R
T
- 55 °C to + 155 °C
- 55 °C to + 155 °C
< - 20 dB typical
< 0.01 µV/°C
200 ppm
1 year at + 25 °C
MIL-STD-202 Method 308
2000 h at + 70 °C under Pn
Ratio
Absolute
± 100 ppm/°C (± 50 ppm/°C on request)
1/1 standard (unequal values: please consult)
± 0.5 %, ± 1 %, ± 2 %
- 55 °C to + 155 °C
SPECIFICATIONS
PASSIVATED CHROMIUM SILICON
10 kΩ to 5 MΩ
± 5 ppm/°C
for R
T
= R
1
+ R
2
- 55 °C to + 155 °C
CONDITIONS
* Please see document “Vishay Green and Halogen-Free Definitions (5-2008)” http://www.vishay.com/doc?99902
www.vishay.com
24
For technical questions, contact: sfer@vishay.com
Document Number: 60067
Revision: 06-Oct-08
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