SN74ALVC08IDRG4Q1 datasheet, PDF

SN74ALVC08IDRG4Q1: DescriptionLogic Gates Quad 2-Inp Pos-AND Gate; Categorylogic logic; File Size716KB，11 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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Logic Gates Quad 2-Inp Pos-AND Gate

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SOIC
package instruction	SOP, SOP14,.25
Contacts	14
Reach Compliance Code	unknown
Factory Lead Time	1 week
series	ALVC/VCX/A
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	8.65 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	AND GATE
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP14,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Sup	2.9 ns
propagation delay (tpd)	5.3 ns
Certification status	Not Qualified
Schmitt trigger	NO
Filter level	AEC-Q100
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm

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