EEWORLDEEWORLDEEWORLD

Part Number

Search

M8340109V9761DGUP

Description
Array/Network Resistor, Isolated, Thin Film, 9760ohm, 100V, 0.5% +/-Tol, -50,50ppm/Cel, 9810
CategoryPassive components    The resistor   
File Size83KB,4 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric View All

M8340109V9761DGUP Overview

Array/Network Resistor, Isolated, Thin Film, 9760ohm, 100V, 0.5% +/-Tol, -50,50ppm/Cel, 9810

M8340109V9761DGUP Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid997843144
Reach Compliance Codenot_compliant
Country Of OriginUSA
ECCN codeEAR99
YTEOL6.8
structureMolded
Lead length3.43 mm
lead spacing2.54 mm
Network TypeIsolated
Number of terminals10
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package height4.75 mm
Package length24.97 mm
Package formSIP
Package width2.41 mm
GuidelineMIL-PRF-83401
resistance9760 Ω
Resistor typeARRAY/NETWORK RESISTOR
seriesM83401
size code9810
technologyTHIN FILM
Temperature Coefficient50 ppm/°C
Tolerance0.5%
Operating Voltage100 V
M83401, C83401
www.vishay.com
Vishay Dale Thin Film
Thin Film Resistor Network Military, MIL-PRF-83401 Qualified,
Type RZ070, RZ080, RZ090, RZ210, RZ220, RZ230,
Single-In-Line SIP
FEATURES
MIL-PRF-83401 qualified (cage code 57489)
Low Profile 0.195" (4.95 mm seated height)
Characteristics R (± 25 ppm), H, V, K, and M
Hot fused tin/lead 60/40 solder dipped
Rugged molded low profile construction with standoff
100 % screened to groups A MIL-PRF-83410 testing
Tolerances to 0.1 %
Isolated and bussed (schematic C and G)
Qualified to meet MIL-PRF-83401 characteristic “R”, “V”, and “H”
These resistor networks are available in 6 pins, 8 pins, and
10 pins in schematic C and G styles. Custom circuits are not
available. Schematic C and G only. They incorporate Vishay
Dale Thin Film’s patented passivated nichrome film to give
superior performance on temperature coefficient of
resistance, thermal stability, noise, voltage coefficient,
power handling and resistance stability. The leads are
attached to the metallized alumina substrates by
Thermo-Compression bonding. The body is molded
thermoset plastic with gold plated copper alloy leads. This
product will outperform all of the requirements of
characteristic “R”, “V”, and “H” of MIL-PRF-83401.
TYPICAL PERFORMANCE
ABSOLUTE
TCR
TOL.
25
ABSOLUTE
0.1
TRACKING
5
RATIO
0.1 to 0.05
SCHEMATIC
C Schematic (Pin 1 Common)
G Schematic (Isolated)
1
2
3
4
N
1
2 3
4
N
STANDARD ELECTRICAL SPECIFICATIONS
TEST
Material
Pin/Lead Number
Resistance Range
TCR: Absolute
TCR: Tracking
Tolerance: Absolute
Tolerance: Ratio
Power Rating: Resistor
Power Rating: Package
Stability: Absolute
Stability: Ratio
Voltage Coefficient
Working Voltage
Operating Temperature Range
Storage Temperature Range
Noise
Thermal EMF
Shelf Life Stability: Absolute
Shelf Life Stability: Ratio
SPECIFICATIONS
Passivated nichrome
6, 8, 10
100
to 200 k per resistor
± 25 ppm/°C to 300 ppm/°C
± 5 ppm/°C
± 0.1 % to ± 5.0 %
± 0.1 % to R
1
0.06 mW to 0.120 mW (per element typical at + 25 °C)
(1)
0.18 W to 1.08 W
(1)
R
± 0.05 %
R
± 0.015 %
< 0.1 ppm/V
100 V
- 55 °C to + 125 °C
- 55 °C to + 125 °C
< - 30 dB
< 0.08 μV/°C
R
± 0.01 %
R
± 0.002 %
CONDITIONS
-
-
Tolerance dependent
(2)
- 55 °C to + 125 °C
(1)
- 55 °C to + 125 °C
+ 25 °C
+ 25 °C
Maximum at + 70 °C
Maximum at + 70 °C
2000 h at + 70 °C
2000 h at + 70 °C
-
-
-
-
-
-
1 year at + 25 °C
1 year at + 25 °C
Notes
(1)
Consult MIL-PRF-83401
(2)
“H” characteristic 100
to 100 k resistance range at 0.1% best
“R” characteristic 250
to 100 k resistance range at 0.1% best
“R” characteristic 250
to 200 k resistance range at 1% best
Revision: 01-Mar-13
Document Number: 60116
61
For technical questions, contact:
thinfilm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
What is the highest delay resolution that FPGA can achieve currently?
I would like to ask for help from my brothers and sisters. Can the highest delay step that the current FPGA can achieve reach 1ps? Thank you in advance....
xd2186 FPGA/CPLD
Is the highest bit of the result of binary signed multiplication the sign extended bit?
There seems to be a saying that the highest bit of the result of binary signed multiplication is the extended sign bit, and we often delete it in actual engineering. However, I found that if the maxim...
sharbioue FPGA/CPLD
Controllable gain amplification
[i=s] This post was last edited by paulhyde on 2014-9-15 03:00 [/i] Controllable gain amplification, adjust the voltage on pin 3 to adjust the gain...
成杨 Electronics Design Contest
Are configuration words required for PIC microcontrollers?
I bought a PIC development board this month. It works when I burn C code on the board, but not when I burn the assembler. Do I need to configure the word for the PIC microcontroller? This is the assem...
windirection Microchip MCU
Talent search---1. Macintosh development C++ 2. C# development engineer for Microsoft in the United States
Looking for a top of their class Engineer, who is devoted to building world-class software, and motivated to get real world experience in an exciting software environment. If you are passionate about ...
wangtong0819 Embedded System
This is my first time drawing a board. Please give me some advice.
Can you please tell me if there is anything wrong with it? (The flying line was left there intentionally)...
哎吆我去 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 713  1826  2430  815  909  15  37  49  17  19 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号