EEWORLDEEWORLDEEWORLD

Part Number

Search

511FAA133M000AAGR

Description
Oscillator, 0.1MHz Min, 250MHz Max, 133MHz Nom,
CategoryPassive components    oscillator   
File Size233KB,26 Pages
ManufacturerSkyworks
Websitehttp://www.skyworksinc.com
Environmental Compliance
Download Datasheet Parametric View All

511FAA133M000AAGR Online Shopping

Suppliers Part Number Price MOQ In stock  
511FAA133M000AAGR - - View Buy Now

511FAA133M000AAGR Overview

Oscillator, 0.1MHz Min, 250MHz Max, 133MHz Nom,

511FAA133M000AAGR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid4037663135
Reach Compliance Codecompliant
JESD-609 codee4
Installation featuresSURFACE MOUNT
Number of terminals6
Maximum operating frequency250 MHz
Minimum operating frequency0.1 MHz
Nominal operating frequency133 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialCERAMIC
Encapsulate equivalent codeDILCC6,.2
Certification statusNot Qualified
Maximum slew rate23 mA
Nominal supply voltage2.5 V
surface mountYES
Terminal surfaceGold (Au) - with Nickel (Ni) barrier
S i 5 1 0 / 5 11
C
R YS TA L
O
SCILLATOR
(XO) 100 kH
Z
Features
TO
250 MH
Z
Supports any frequency from
100 kHz to 250 MHz
Low jitter operation
2 to 4 week lead times
Total stability includes 10-year
aging
Comprehensive production test
coverage includes crystal ESR and
DLD
On-chip LDO regulator for power
supply noise filtering
3.3, 2.5, or 1.8 V operation
Differential (LVPECL, LVDS,
HCSL) or CMOS output options
Optional integrated 1:2 CMOS
fanout buffer
Runt suppression on OE and
power on
Industry standard 5 x 7 and
3.2 x 5 mm packages
Pb-free, RoHS compliant
–40
to 85
o
C operation
Si5602
Applications
SONET/SDH/OTN
Gigabit Ethernet
Fibre Channel/SAS/SATA
PCI Express
Ordering Information:
See page 14.
3G-SDI/HD-SDI/SDI
Telecom
Switches/routers
FPGA/ASIC clock generation
Pin Assignments:
See page 12.
Description
The Si510/511 XO utilizes Silicon Laboratories' advanced DSPLL technology
to provide any frequency from 100 kHz to 250 MHz. Unlike a traditional XO
where a different crystal is required for each output frequency, the Si510/511
uses one fixed crystal and Silicon Labs’ proprietary DSPLL synthesizer to
generate any frequency across this range. This IC-based approach allows
the crystal resonator to provide enhanced reliability, improved mechanical
robustness, and excellent stability. In addition, this solution provides superior
supply noise rejection, simplifying low jitter clock generation in noisy
environments. Crystal ESR and DLD are individually production-tested to
guarantee performance and enhance reliability. The Si510/511 is factory-
configurable for a wide variety of user specifications, including frequency,
supply voltage, output format, output enable polarity, and stability. Specific
configurations are factory-programmed at time of shipment, eliminating long
lead times and non-recurring engineering charges associated with custom
frequency oscillators.
OE
1
4
V
DD
GND
2
3
CLK
Si510 (CMOS)
NC
OE
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Functional Block Diagram
V
DD
OE
Si510(LVDS/LVPECL/HCSL/
Dual CMOS)
OE
OE
1
1
2
2
3
3
6
6
5
5
4
4
V
DD
V
DD
CLK–
CLK–
CLK+
CLK+
Low Noise Regulator
Fixed
Frequency
Oscillator
Any-Frequency
0.1 to 250 MHz
DSPLL
®
Synthesis
CLK+
CLK–
NC
NC
GND
GND
GND
Si511(LVDS/LVPECL/HCSL/
Dual CMOS)
Rev. 1.1 1/13
Copyright © 2013 by Silicon Laboratories
Si510/511
Why was the "Qianlima" abandoned?
Everyone is familiar with the famous story of Bole selecting horses. The most classic sentence among them is "There are many good horses, but Bole is rare." For those who have just started working or ...
ESD技术咨询 Talking about work
Interview
In the daily work of R&D, the recruitment of technical engineers and technical managers is one of my basic tasks, and I also regard it as my most important work, although this work does not take up to...
蒋李 Talking about work
Analysis - Issues regarding edge pulse detection
Why are led_d1, led_d2, led_d3 triggered on the falling edge of led_ctrl[0], led_ctrl[1], led_ctrl[2], but not on the rising edge? Below is the program , which is a key operation using edge pulse dete...
eeleader FPGA/CPLD
Android classic project case development practice guide
[i=s]This post was last edited by ienglgge on 2014-2-17 22:31[/i] Android classic project case development practical guide CD data. [url]http://pan.baidu.com/disk/home#s/key=Android%E7%BB%8F%E5%85%B8%...
ienglgge Linux and Android
Dear Gods, please help me
Why can't I get out of the HAL_BOARD_INIT() function when debugging with the emulator?...
weiruiqi120 RF/Wirelessly
【Nucleo Experience】+ 8x8 dot matrix driver (EX02)
The previous experiment was to display a set of data statically on the 8x8 dot matrix. This experiment is to display multiple sets of data in the table in sequence to make a dynamic display demonstrat...
slotg stm32/stm8

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 655  1017  2553  2587  2352  14  21  52  53  48 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号