Surface Mount
Chip Capacitors
Ultra High Frequency
HIGH Q
Features
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High 'Q' Factor at high frequencies
High RF power capabilities
Low ESR
High self resonant frequencies
Excellent stability across temperature range
Small size
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10
12
05
08
06
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03
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High Frequency Measurement and Performance
of High 'Q' Multilayer Ceramic Capacitors
Introduction
Capacitors used in high frequency applications are generally used in
two particular circuit applications:
●
As a DC block providing an AC coupling path between other
components.
●
As a shunt path to ground for AC voltages thus providing a
decoupling path.
At very high frequencies much more capacitor design data is
needed by a circuit designer. As well as the normal data relating to
Capacitance and Tan
δ,
‘Q’ and E.S.R. are required. If RF/
microwave circuit simulation aids are being used, then the designer
will require information relating to the 1 Port and 2 Port
parameters, the ‘S’ parameters denoted by S11, S21, S12, S22.
The measurement problem becomes complex because the resultant
measurements should properly describe the parameters of the
multilayer capacitor but be totally uninfluenced by any test jigs used
in the measurement.
The first and extensive part of this measurement sequence involves
the calibration (otherwise known as ‘de-embedding’) of all the test
jigs.
The information on Syfer Technology High 'Q' Capacitors contained
in this catalogue has been produced utilising a Hewlett Packard
Network Analyser - HP8753A, together with the Hewlett Packard ‘S’
Parameter Test Set - HP 85046A.
0.47pF
0.56
0.68
0.82
1.0
1.2
1.5
1.8
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
10
12
15
18
22
27
33
39
47
56
68
82
100
120
150
180
220
270
330
390
470
560
680
820
1.0nF
0p47
0p56
0p68
0p82
1p0
1p2
1p5
1p8
2p2
2p7
3p3
3p9
4p7
5p6
6p8
8p2
100
120
150
180
220
270
330
390
470
560
680
820
101
121
151
181
221
271
331
391
471
561
681
821
102
200V
200V
500V
100V
100V
100V
200V
500V
100V
Measurement Theory
At frequencies above 30MHz, the measurements from conventional
capacitor bridges become invalid because it is not possible to
maintain a true four-terminal connection to the capacitor under test,
hence phase errors occur and this prohibits the separation of the
resistive and reactive components which need to be measured.
In addition the ‘open’ circuits and ‘short’ circuits used to calibrate
the bridge become degraded. The ‘open’ circuits become capacitive
and the ‘short’ circuits become inductive, hence measurement
accuracy is destroyed.
However, other measurement techniques can be used to solve
these problems. These techniques use the behaviour of electric
‘waves’ travelling along a transmission line, e.g. a co-axial cable or
a micro-strip line.
If the transmission line is terminated by an unknown impedance,
e.g. the capacitor under test, then a reflected wave is created which
is sent back towards the test signal generator and has a magnitude
and phase angle dependent on the unknown impedance. We now
have two waves, travelling in opposite directions, giving, in effect,
the required four terminal connections to the capacitor, provided
only that these waves can be separated out and independently
measured.
This separation is easily possible using variations on standard
Wheatstone Bridge principles. Hence by the measurement of the
magnitudes and phases of these travelling waves, which are called
Scattering or ‘S’ waves, the capacitor parameters can be calculated.
It should be noted that since these measurements rely on reflected
waves, any changes in physical size, or changes in characteristic
impedance between the measurement system and the points to
which the capacitor is connected, will create additional and
unwanted reflected waves, which will degrade the measurement
accuracy.
Accuracy of capacitor placement relative to the calibration plane is
also critical. For instance, measurements of a capacitor having a ‘Q’
of approximately 3000 and thus a Tan
δ
of 0.00035 will mean the
phase loss angle will be of the order of 0.02 or restated -89.98 of
phase or further restated, real and imaginary ratios approaching
1:3000. To achieve measurement accuracy, the connections to the
capacitor under test should operate to at least one order better
than this phase angle value. In jigging or mechanical terms
1.00mm of displacement from the correct or calibration plane,
represents 0.1 of phase angle, thus the phase angle errors due to
the jigging etc., should be less than 0.02mm (0.0008"). These
calculations assume a dielectric constant of 1 and a frequency of
100MHz.
40
notes
1. For details of ordering see page 44.
2. Additional sizes and values available on request.
3. Available only with Nickel Barrier terminations.
31
Surface
High Frequency
Capacitors
Mount
Chip
Ultra
HIGH Q
Measurement Techniques
Three different measurement jig methods have been used:
●
The H.P. 16091A co-axial test jig was used to determine:
●
Capacitance
●
Tan
δ
●
‘Q’
●
E.S.R.
●
To simulate the DC block mode and shunt or decoupling mode,
special micro-strip line test jigs were designed and made.
All values - 0603 chip size
Q
10,000
1,000
Q
Equipment
The measurement system used comprises a HP 8753A Vector
Network Analyser, HP 85046A ‘S’ parameter test set and HP 16091A
test jig together with the relevant specialist cables, connectors and
micro-strip line test jigs.
100
12pF
0.68pF
10
3.3pF
Notes
a) The swept frequency range over which all measurements were
taken was 1MHz to 3GHz with measurements at 10MHz increments
below 1GHz, increments of 50MHz above 1GHz.
b) For the very low capacitance values, the lowest frequencies at
which sensible data was obtained appeared to be greater than
50MHz, the data is thus presented.
c) The curves showing the resonant points for the capacitors have
been left in as a guide to these points of resonance. However, due
to the rapid changes in all aspects of the capacitors' parameters
near to the resonant point, such measurements should be treated
with caution. Above resonance the capacitance curves are
dominated by the self-inductance of the capacitor.
d) For specific design work it may be possible to provide full ‘S’
Parameter data. If this is required please contact our Sales Office.
1
100
1,000
10,000
Frequency MHz
ESR
ESR ohms
Frequency MHz
Insertion Loss
0
-10
Insertion Loss dB
-20
-30
-40
-50
-60
-70
-80
1
10
100
1,000
12pF
3.3pF
0.68pF
10,000
Frequency MHz
41
FPGA/CPLD
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