L3A41C561M4X2F datasheet, PDF - EEWORLD Datasheet

L3A41C561M4X2F: DescriptionISOLATED C NETWORK, 100V, X7R, 0.00056uF, SURFACE MOUNT, CHIP-8, CHIP; CategoryPassive components capacitor; File Size589KB，2 Pages; ManufacturerAVX

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L3A41C561M4X2F Overview

ISOLATED C NETWORK, 100V, X7R, 0.00056uF, SURFACE MOUNT, CHIP-8, CHIP

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Objectid	1996778958
package instruction	CHIP,
Reach Compliance Code	compliant
ECCN code	EAR99
YTEOL	8.3
capacitance	0.00056 µF
Capacitor type	ARRAY/NETWORK CAPACITOR
dielectric materials	CERAMIC
JESD-609 code	e0
length	1.6 mm
Installation features	SURFACE MOUNT
negative tolerance	20%
Network Type	ISOLATED C NETWORK
Number of components	1
Number of functions	4
Number of terminals	8
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
encapsulated code	CHIP
Package shape	RECTANGULAR PACKAGE
Package form	SMT
method of packing	TR, 7 Inch
positive tolerance	20%
Rated (DC) voltage (URdc)	100 V
Guideline	AEC-Q200; TS 16949
Maximum seat height	1.35 mm
size code	0612
surface mount	YES
Temperature characteristic code	X7R
Temperature Coefficient	15% ppm/°C
Terminal surface	TIN LEAD
Terminal shape	WRAPAROUND
width	3.2 mm

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